3.3.10Combinational Circuits

Parity generators - checkers

1,984 words9 min readdifficulty · medium

A tiny error-detection scheme: add ONE extra bit so the number of 1s follows a rule. If a single bit flips during transmission, the rule breaks — and we catch it.

The Core Idea

WHAT is the key operation? — XOR

Let's derive this. Recall the 2-input XOR truth table:

aa bb aba\oplus b
0 0 0
0 1 1
1 0 1
1 1 0

ab=1a\oplus b = 1 exactly when the number of 1s among {a,b}\{a,b\} is odd. Chaining XORs preserves this: XOR is associative, so

abc={1if odd number of 1s0if even number of 1sa \oplus b \oplus c \oplus \dots = \begin{cases} 1 & \text{if odd number of 1s} \\ 0 & \text{if even number of 1s} \end{cases}

Figure — Parity generators - checkers

Worked Examples

Common Mistakes

Active Recall

Recall Feynman: explain to a 12-year-old

Imagine sending a secret message made of yes/no lights (1s and 0s). You and your friend agree: "the number of lights that are ON should always be even." Before sending, you count your ON lights — if it's odd, you flip on ONE extra light so it becomes even. Your friend counts when it arrives. If they get an odd number, they know a light got messed up on the way — like a broken bulb flickering. It can't tell them which bulb, just that something's off. And if TWO bulbs break, the count stays even and it gets fooled — that's its weakness.

What logic gate naturally computes parity?
XOR — its output is 1 iff an odd number of inputs are 1.
Formula for an even-parity generator over data bits did_i?
P=d0d1dn1P = d_0 \oplus d_1 \oplus \dots \oplus d_{n-1} (XOR of all data bits).
Formula for an odd-parity generator?
P=d0dn1P = \overline{d_0 \oplus \dots \oplus d_{n-1}} (XNOR of all data bits).
How does a parity checker produce its error signal EE?
XOR of ALL received bits including P: E=d0dn1PE=d_0\oplus\dots\oplus d_{n-1}\oplus P.
In even parity, what value of EE means an error?
E=1E=1 (a correct even word gives E=0E=0).
Why does a single bit flip get detected?
It changes the count of 1s by ±1\pm1, flipping the parity and thus flipping EE.
Why are double-bit errors missed?
Two flips change the count by an even amount, restoring the original parity, so EE is unchanged.
Can simple parity correct errors?
No — it only detects (odd numbers of errors); it can't locate the faulty bit.
Even-parity gen for data 101?
101=01\oplus0\oplus1=0, so P=0P=0; word =1010=1010.
Odd-parity gen for data 101?
XOR =0=0, complement =1=1, so P=1P=1; word =1011=1011.
Relationship between a generator and checker circuit?
Same XOR tree; the checker is just an (n+1)(n{+}1)-input version that also XORs P.

Connections

  • XOR and XNOR gates — the building block; parity is chained XOR.
  • Combinational Circuits — parity circuits are purely combinational (no memory).
  • Error Detection and Correction — parity is the simplest detection scheme.
  • Hamming Codes — extends parity with multiple parity bits to locate and correct errors.
  • Multiplexers & Adders — other XOR-heavy combinational blocks.
  • Checksums and CRC — stronger error-detection successors of parity.

Concept Map

motivates

adds

is the tool for

even convention

odd convention

generated at

generated at

sends word

XORs all bits incl P

flips count by ±1

E flips

Bit flip during transmission

Parity error detection

One extra parity bit

XOR = odd count of 1s

P even = XOR of data bits

P odd = XNOR of data bits

Parity generator

Parity checker

Error signal E

Single-bit error detected

Hinglish (regional understanding)

Intuition Hinglish mein samjho

Socho tum apne dost ko lights ki language me message bhej rahe ho — kuch lights ON (1) aur kuch OFF (0). Beech raaste me kabhi-kabhi noise ki wajah se koi light galti se flip ho jaati hai. Toh dost ko kaise pata chale ki message kharab aaya? Iske liye hum ek extra parity bit add karte hain. Rule simple: "total ON lights hamesha EVEN honi chahiye" (ya odd, jo convention chuno).

Yeh kaam XOR gate karta hai, kyunki XOR ka output tabhi 1 hota hai jab 1s ki ginti odd ho. Toh even-parity generator ka formula banta hai P=d0d1P = d_0 \oplus d_1 \oplus \dots — agar data me odd number of 1s hain toh P=1P=1 lag jaata hai jisse total even ho jaaye. Odd parity ke liye bas ise ulta (XNOR) kar do.

Receiver side pe checker saare bits (data + P) ko phir se XOR karta hai. Even system me agar E=0E=0 aaya matlab sab theek, aur E=1E=1 matlab koi bit flip hua hai — ERROR! Kyun? Kyunki ek bit flip hone se 1s ki ginti ±1\pm1 badalti hai, parity ulat jaati hai, aur EE change ho jaata hai.

Ek important baat — parity sirf detect karta hai, correct nahi. Aur agar DO bits ek saath flip ho jaayein toh ginti wapas even ho jaati hai aur parity fool ho jaata hai. Isiliye strong error-fixing ke liye Hamming codes use hote hain. Par cost-wise parity sabse sasta safety net hai — bas ek extra bit!

Go deeper — visual, from zero

Test yourself — Combinational Circuits

Connections