Combinational Circuits

Q1. [3 marks]

• $\text{Sum} = A \oplus B$ (1.5)
• $\text{Carry} = A \cdot B$ (1.5)

Why: Sum is 1 when inputs differ (XOR); carry is generated only when both are 1 (AND).

Q2. [4 marks]

• $\text{Sum} = A \oplus B \oplus C_{in}$ (1.5)
• $C_{out} = A\cdot B + C_{in}\cdot(A \oplus B)$ (or $AB+BC_{in}+AC_{in}$) (1.5)
• Built from 2 half adders + 1 OR gate (1)

Why: First HA adds $A,B$; second HA adds their sum with $C_{in}$; OR combines the two intermediate carries.

Q3. [4 marks]

• Carry ripples through 4 stages, each $2\Delta$: $t = 4 \times 2\Delta = 8\Delta$ (2)
• Slow because each stage's carry-out depends on the previous stage's carry-in, so the carry must propagate sequentially through all stages — delay grows linearly with word length. (2)

Q4. [5 marks]

• $g_i = A_i \cdot B_i$ (1)
• $p_i = A_i \oplus B_i$ (or $A_i + B_i$) (1)
• $C_1 = g_0 + p_0 C_0$ (1.5)
• $C_2 = g_1 + p_1 g_0 + p_1 p_0 C_0$ (1.5)

Why: A carry is produced if generated at that bit, or propagated from a lower carry. Expanding recursively removes ripple dependency → constant depth.

Q5. [4 marks]

• A full subtractor computes $A - B - B_{in}$ producing a borrow instead of a carry; it uses a borrow-in/borrow-out. (1)
• $\text{Difference} = A \oplus B \oplus B_{in}$ (1.5)
• $B_{out} = \bar{A}B + \bar{A}B_{in} + B B_{in}$ (or $\bar A B + (\overline{A\oplus B})B_{in}$) (1.5)

Why: Difference mirrors adder sum; borrow arises when the minuend bit is smaller than subtrahend + incoming borrow.

Q6. [4 marks] $Y = \bar{S_1}\bar{S_0}I_0 + \bar{S_1}S_0 I_1 + S_1\bar{S_0}I_2 + S_1 S_0 I_3$ Each correct product term (1 each).

Why: Each select combination enables exactly one data input onto the output.

Q7. [4 marks]

• Decoder: activates one output line based on binary input code (no data input). Demultiplexer: routes a single data input to one of several outputs selected by control lines. (A decoder = demux with data input tied to enable.) (2)
• 3-to-8 decoder has 8 output lines, and exactly 1 output is active for any input. (2)

Q8. [4 marks]

• A priority encoder outputs the binary code of the highest-priority active input, resolving the ambiguity when multiple inputs are HIGH (ordinary encoder gives invalid output for multiple inputs). (2)
• $D_5$ (higher priority than $D_2$) wins → output = binary $5$ = $\mathbf{101}$. (2)

Q9. [4 marks]

• Even parity: total number of 1s (data + parity) must be even, so $P = D_2 \oplus D_1 \oplus D_0$. (2)
• For input $101$: $1 \oplus 0 \oplus 1 = 0$, so $P = \mathbf{0}$. (2)

Why: Data $101$ already has two 1s (even), so parity bit is 0 to keep it even.

Q10. [4 marks]

• A static-1 hazard is a momentary transient (glitch) to 0 on an output that should remain steady at 1 while inputs change, caused by unequal path delays. (2)
• Eliminated by adding redundant (consensus) prime-implicant terms to cover the transition between adjacent groups in the K-map. (2)

[
  {"claim":"4-bit RCA final carry delay = 8*delta", "code":"delta=symbols('delta'); result = (4*2*delta) == 8*delta"},
  {"claim":"Full subtractor difference for A=1,B=0,Bin=1 is 0", "code":"A,B,Bin=1,0,1; result = ((A ^ B ^ Bin)==0)"},
  {"claim":"Even parity bit for data 101 is 0", "code":"D=[1,0,1]; result = ((D[0]^D[1]^D[2])==0)"},
  {"claim":"Priority encoder with D5,D2 high outputs binary 5 = 101", "code":"hi=5; bits=[(hi>>2)&1,(hi>>1)&1,hi&1]; result = (bits==[1,0,1])"},
  {"claim":"C2 for A=[1,1],B=[1,0],C0=0 gives carry into bit2 = 1", "code":"A0,B0,A1,B1,C0=1,1,0,1,0; g0=A0&B0; p0=A0^B0; g1=A1&B1; p1=A1^B1; C2=g1|(p1&g0)|(p1&p0&C0); result = (C2==1)"}
]