Combinational Circuits
Chapter: 3.3 Combinational Circuits Level: 1 — Recognition (MCQ, Matching, True/False with justification) Time Limit: 20 minutes Total Marks: 30
Section A — Multiple Choice (1 mark each) [10 marks]
Choose the single best answer.
Q1. The sum output of a half adder is given by:
- (a)
- (b)
- (c)
- (d)
Q2. A full adder has how many inputs and outputs respectively?
- (a) 2 inputs, 2 outputs
- (b) 3 inputs, 2 outputs
- (c) 3 inputs, 3 outputs
- (d) 2 inputs, 3 outputs
Q3. The main disadvantage of a ripple-carry adder is:
- (a) High component count
- (b) Carry propagation delay
- (c) Inability to add signed numbers
- (d) It cannot produce a carry-out
Q4. In a carry-lookahead adder, the generate term equals:
- (a)
- (b)
- (c)
- (d)
Q5. A multiplexer requires how many select lines?
- (a) 1
- (b) 2
- (c) 3
- (d) 4
Q6. A demultiplexer performs the reverse function of a:
- (a) Decoder
- (b) Encoder
- (c) Multiplexer
- (d) Comparator
Q7. A priority encoder differs from an ordinary encoder because it:
- (a) Has more outputs
- (b) Resolves the case when multiple inputs are active
- (c) Uses fewer gates
- (d) Cannot produce a valid output
Q8. A decoder has how many output lines?
- (a) 3
- (b) 6
- (c) 8
- (d) 16
Q9. For a full adder producing sum and carry , the carry-out is:
- (a)
- (b)
- (c)
- (d)
Q10. A static-1 hazard occurs when an output that should remain at logic 1 momentarily:
- (a) Stays at 1
- (b) Glitches to 0
- (c) Oscillates permanently
- (d) Rises to 1 slowly
Section B — Matching (1 mark each) [8 marks]
Match each circuit in Column X with its correct function in Column Y.
| Column X | Column Y |
|---|---|
| Q11. Encoder | (i) Selects one of many inputs onto a single output |
| Q12. Decoder | (ii) Compares two numbers and indicates >, =, < |
| Q13. Multiplexer | (iii) Converts input lines to coded outputs |
| Q14. Comparator | (iv) Cyclically/logically shifts data by a variable amount |
| Q15. Parity generator | (v) Converts inputs to active output lines |
| Q16. Barrel shifter | (vi) Adds two n-bit numbers |
| Q17. Full adder (array) → multiplier | (vii) Produces a bit making total 1s even/odd |
| Q18. Ripple-carry adder | (viii) Produces product of two binary numbers |
Write your answer as Q11–(?), etc.
Section C — True / False with justification (2 marks each) [12 marks]
State True or False (1 mark) and give a one-line justification (1 mark).
Q19. A half subtractor produces both a difference and a borrow output.
Q20. A carry-lookahead adder is slower than a ripple-carry adder for large word sizes.
Q21. An multiplexer can be used to implement any Boolean function of select variables.
Q22. A parity checker for even parity outputs 1 when the received word (including parity bit) contains an odd number of 1s.
Q23. A 4-bit magnitude comparator needs only the equality output to determine the "greater-than" result.
Q24. Static hazards can be eliminated by adding redundant (consensus) prime implicants to the logic.
Answer keyMark scheme & solutions
Section A (1 mark each)
Q1 — (c) . The sum bit is 1 only when inputs differ; carry .
Q2 — (b) 3 inputs (), 2 outputs (). Full adder extends half adder by adding a carry-in.
Q3 — (b) Carry propagation delay. Each stage must wait for the previous carry, giving worst-case delay .
Q4 — (c) . A carry is generated regardless of carry-in when both bits are 1.
Q5 — (b) 2 select lines. .
Q6 — (c) Multiplexer. DEMUX routes one input to one of many outputs — the inverse of a MUX.
Q7 — (b) Resolves multiple active inputs by fixed priority. Ordinary encoder gives invalid output if two inputs are high.
Q8 — (c) 8. inputs → outputs.
Q9 — (a) . Carry-out is the majority function of the three inputs.
Q10 — (b) Glitches to 0. Static-1 hazard = momentary drop to 0 while output should stay at 1.
Section B (1 mark each)
| Q | Answer |
|---|---|
| Q11 Encoder | (iii) |
| Q12 Decoder | (v) |
| Q13 Multiplexer | (i) |
| Q14 Comparator | (ii) |
| Q15 Parity generator | (vii) |
| Q16 Barrel shifter | (iv) |
| Q17 Multiplier | (viii) |
| Q18 Ripple-carry adder | (vi) |
Note: (vi) "Adds two n-bit numbers" maps to the adder; the multiplier maps to (viii).
Section C (2 marks each: 1 T/F + 1 justification)
Q19 — True. Difference and borrow . Both outputs are essential.
Q20 — False. CLA is faster; it computes carries in parallel from , removing the serial ripple, giving near-constant carry delay.
Q21 — False (with nuance). An MUX with select lines implements any function of variables (not ). More precisely, a MUX implements any function of select variables. Justification: number of select lines = number of function variables it can fully address.
Q22 — True. For even parity the total number of 1s in the transmitted word should be even; the checker outputs 1 (error) when it detects an odd count.
Q23 — False. Equality alone cannot rank magnitude; a comparator needs additional bit-by-bit logic (or A>B / A<B outputs) to decide greater-than.
Q24 — True. Adding the consensus (redundant) term bridges adjacent prime implicants on the K-map, keeping the covering term active during transitions and removing static hazards.
[
{"claim":"Full adder carry-out equals majority function AB+BCin+ACin equals ABCin OR of pairwise",
"code":"A,B,C=symbols('A B C'); f=(A&B)|(B&C)|(A&C); g=(A&B|B&C|A&C); result = simplify_logic(Xor(f,g))==false"},
{"claim":"Half adder sum = A XOR B and carry = A AND B are distinct",
"code":"A,B=symbols('A B'); s=Xor(A,B); c=A&B; result = simplify_logic(Xor(s,c))!=false"},
{"claim":"4:1 MUX needs 2 select lines since 2**2=4",
"code":"result = (2**2==4) and (2**1<4)"},
{"claim":"3:8 decoder outputs = 2**3 = 8",
"code":"result = 2**3==8"},
{"claim":"Half subtractor borrow = (not A) and B",
"code":"A,B=symbols('A B'); bor=(~A)&B; result = simplify_logic(bor)==simplify_logic((~A)&B)"}
]