Before you can enjoy the parent note on multiplexers, you must be able to read it. The parent throws around bars, subscripts, plus signs that aren't addition, log2, minterms, and a big ∑. This page picks up each of those marks, one at a time, and hands you a plain-words meaning and a picture for it. Nothing here assumes you've seen digital logic before.
Look at the two wires in the figure: one sits at the bottom rail (0), one at the top rail (1). There is no in-between in this world — that is what makes the maths so clean. We need the bit because a multiplexer's inputs, output, and selects are all bits.
Recall Why only two states?
Because transistors are easiest to build as switches that are either fully off or fully on. Two clean states means noise rarely flips a 0 into a 1.
In the figure, follow the wire through the little triangle-with-a-bubble (that shape is the inverter). A 1 goes in the left, a 0 comes out the right. The bubble on the tip is the picture of the bar. We need inversion because a multiplexer must be able to say "do this when the switch is 0" — and "S=0" is exactly the situation where Sˉ=1.
The select wires don't act alone — read together, high wire first, they spell a number in base-2.
The figure is an odometer: 2 wheels each with digits 0,1 can show 00,01,10,11 — that's 4 distinct settings from 2 wheels. In general n wheels give 2n settings.
Check: for N=4 inputs, log24=2 exactly, so 2 selects. For N=8, log28=3. For N=5, log25≈2.32, round up to 3.
The recipe: for each select bit, use the plain letter where you want that bit to be 1, and the barred letter where you want it to be 0. Then AND them.
Now the parent's scary formula reads like plain English:
Y=∑k=02n−1mkIk=(spotlight0)I0+(spotlight1)I1+⋯
"Light exactly one spotlight, and pass the input under it."
You can now read the parent's first boxed equation cold:
Y=SˉI0+SI1
Word for word: "the output Y equals (NOT-S AND input-0) OR (S AND input-1)." Test both dial positions:
S=0: Sˉ=1, so Y=1⋅I0+0⋅I1=I0. ✅
S=1: Y=0⋅I0+1⋅I1=I1. ✅
Every symbol you needed was defined above, in order.
This feeds directly into Boolean Algebra Minterms and Shannon Expansion, and the minterm-generator idea becomes the decoder inside the parent's multiplexer note. The inverse routing device is the demultiplexer; the output-gating idea connects to Tri-state Buffers and the whole thing lives inside Combinational Logic Design.