Half adder and full adder: Exercises — Hardware deep dive

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Work each problem before opening the solution. The exercises climb five levels: you first recognise the gates, then apply the equations, then analyse why circuits behave as they do, then synthesise new circuits, and finally reach mastery — connecting adders to real hardware like the Ripple-carry adder and Two's complement subtraction.

Every symbol used here is built in the parent note. Quick reminder of the alphabet:

$A, B$ — the two input bits (each is $0$ or $1$ ).
$C_{in}$ — a carry coming in from the column on the right.
$S$ — the Sum bit (what you see in this column).
$C_{o u t}$ — the Carry-out (what you cart to the next column).
$\oplus$ — the XOR operation: output $1$ when the inputs differ.
$\cdot$ — the AND operation: output $1$ only when both are $1$ .
$+$ — the OR operation: output $1$ when at least one is $1$ . (In Boolean, $+$ is OR, not arithmetic addition!)

Level 1 — Recognition

Exercise 1.1

For a half adder, fill in $(C, S)$ for inputs $A = 0, B = 1$ .

Recall Solution

A half adder computes $S = A \oplus B$ and $C = A \cdot B$ .

$S = 0 \oplus 1 = 1$ (the bits differ, so XOR is $1$ ).
$C = 0 \cdot 1 = 0$ (not both $1$ , so AND is $0$ ).

Answer: $(C, S) = (0, 1)$ . This is decimal $0 + 1 = 1$ , and $1$ in binary is just $1$ — no carry needed. ✓

Exercise 1.2

Which gate produces the carry of a half adder, and which produces the sum?

Recall Solution

Carry comes from an AND gate: $C = A \cdot B$ . Carry only when both bits are $1$ .
Sum comes from an XOR gate: $S = A \oplus B$ . Sum is $1$ when the bits differ.

Mnemonic: See it (Sum = XOR) here, Cart it (Carry = AND) next door.

Exercise 1.3

A full adder has how many inputs and how many outputs? Name them.

Recall Solution

Three inputs: $A$ , $B$ , and $C_{in}$ (the carry from the previous column).
Two outputs: $S$ (Sum) and $C_{o u t}$ (Carry-out).

It is "full" precisely because it accepts the third input $C_{in}$ — a plain half adder cannot.

Level 2 — Application

Exercise 2.1

Compute the full-adder outputs for $A = 1, B = 0, C_{in} = 1$ .

Recall Solution

Full adder: $S = A \oplus B \oplus C_{in}$ , $C_{o u t} = A B + A C_{in} + B C_{in}$ .

$S = 1 \oplus 0 \oplus 1$ . Count the ones among $(1, 0, 1)$ : two ones → even → $S = 0$ .
$C_{o u t} = (1 \cdot 0) + (1 \cdot 1) + (0 \cdot 1) = 0 + 1 + 0 = 1$ .

Answer: $(C_{o u t}, S) = (1, 0)$ . Check: $1 + 0 + 1 = 2 = 1 0_{2}$ , and the two-bit answer $(C_{o u t} S) = 10$ . ✓

Exercise 2.2

Compute the full-adder outputs for $A = 0, B = 1, C_{in} = 1$ .

Recall Solution

$S = 0 \oplus 1 \oplus 1$ : ones = $(0, 1, 1)$ → two ones → even → $S = 0$ .
$C_{o u t} = (0 \cdot 1) + (0 \cdot 1) + (1 \cdot 1) = 0 + 0 + 1 = 1$ .

Answer: $(C_{o u t}, S) = (1, 0)$ . Check: $0 + 1 + 1 = 2 = 1 0_{2}$ . ✓

Exercise 2.3

Add the 3-bit numbers $A = 10 1_{2}$ and $B = 01 1_{2}$ using a chain of full adders (a Ripple-carry adder). Show every column's $(C_{o u t}, S)$ .

Recall Solution

Line them up, rightmost column (bit 0) first. Start with $C_{in} = 0$ .

Look at the ripple diagram — the red carry wire threads from one cell to the next.

Column 0: $A_{0} = 1, B_{0} = 1, C_{in} = 0$ → sum $= 2$ → $S_{0} = 0$ , carry $= 1$ .
Column 1: $A_{1} = 0, B_{1} = 1, C_{in} = 1$ → sum $= 2$ → $S_{1} = 0$ , carry $= 1$ .
Column 2: $A_{2} = 1, B_{2} = 0, C_{in} = 1$ → sum $= 2$ → $S_{2} = 0$ , carry $= 1$ .
Final carry out $= 1$ .

Reading top carry then the sum bits: result $= 100 0_{2} = 8$ . Check: $10 1_{2} = 5$ , $01 1_{2} = 3$ , $5 + 3 = 8$ . ✓

Exercise 2.4

Using the equivalent carry form $C_{o u t} = A B + (A \oplus B) C_{in}$ , verify $C_{o u t}$ for $A = 1, B = 1, C_{in} = 0$ .

Recall Solution

$A B = 1 \cdot 1 = 1$ . The first term already fires.
$(A \oplus B) = 1 \oplus 1 = 0$ , so $(A \oplus B) C_{in} = 0 \cdot 0 = 0$ .
$C_{o u t} = 1 + 0 = 1$ (OR).

Answer: $C_{o u t} = 1$ . Compare with the standard form: $A B + A C_{in} + B C_{in} = 1 + 0 + 0 = 1$ . ✓ Both agree.

Level 3 — Analysis

Exercise 3.1

The carry-out is the majority function of $A, B, C_{in}$ . Explain why $C_{o u t} = A B + A C_{in} + B C_{in}$ encodes "at least two inputs are 1," and confirm it against the parent's truth table.

Recall Solution

Each product term is a pair of inputs both being $1$ :

$A B = 1$ means $A$ and $B$ are $1$ (that's already two ones).
$A C_{in} = 1$ means $A$ and $C_{in}$ are both $1$ .
$B C_{in} = 1$ means $B$ and $C_{in}$ are both $1$ .

The three terms cover every possible pair. If any pair is both- $1$ , at least two inputs are $1$ , and OR-ing the terms fires. If fewer than two inputs are $1$ , no pair is both- $1$ , so $C_{o u t} = 0$ .

Truth-table rows with $C_{o u t} = 1$ are exactly ${011, 101, 110, 111}$ — precisely the rows with two or three ones. ✓

Exercise 3.2

Show algebraically that $C_{o u t} = A B + A C_{in} + B C_{in}$ and $C_{o u t} = A B + (A \oplus B) C_{in}$ are the same function.

Recall Solution

Expand XOR: $A \oplus B = A \overset{ˉ}{B} + \overset{ˉ}{A} B$ . Then $(A \oplus B) C_{in} = A \overset{ˉ}{B} C_{in} + \overset{ˉ}{A} B C_{in} .$ So the second form is $A B + A \overset{ˉ}{B} C_{in} + \overset{ˉ}{A} B C_{in}$ .

Now start from the first form and split its $C_{in}$ terms on whether the other variable is $0$ or $1$ : $A C_{in} = A B C_{in} + A \overset{ˉ}{B} C_{in}, B C_{in} = A B C_{in} + \overset{ˉ}{A} B C_{in} .$ Add them and absorb repeats ( $X + X = X$ ): $A C_{in} + B C_{in} = A B C_{in} + A \overset{ˉ}{B} C_{in} + \overset{ˉ}{A} B C_{in} .$ The term $A B C_{in}$ is already covered by $A B$ (since $A B = A B (C_{in} + \overset{ˉ}{C}_{in})$ contains $A B C_{in}$ ). What's left uncovered is $A \overset{ˉ}{B} C_{in} + \overset{ˉ}{A} B C_{in}$ — exactly the second form's extra terms.

Both reduce to $A B + A \overset{ˉ}{B} C_{in} + \overset{ˉ}{A} B C_{in}$ . Identical. ✓

Exercise 3.3

A student wires a full adder from two half adders and combines the two half-adder carries with an XOR gate instead of OR. For which input row does this give the wrong $C_{o u t}$ ?

Recall Solution

The two half-adder carries are $C_{1} = A B$ and $C_{2} = (A \oplus B) C_{in}$ . The correct final carry is $C_{o u t} = C_{1} + C_{2}$ (OR).

XOR and OR differ only when both inputs are $1$ : XOR gives $0$ , OR gives $1$ . So we need $C_{1} = 1$ and $C_{2} = 1$ simultaneously.

$C_{1} = A B = 1$ requires $A = B = 1$ .
But then $A \oplus B = 0$ , forcing $C_{2} = (A \oplus B) C_{in} = 0$ .

So $C_{1}$ and $C_{2}$ can never both be $1$ — they are mutually exclusive. Therefore XOR and OR give the same result on every row!

Answer: There is no row where it goes wrong. The XOR "bug" is harmless here — a neat consequence of the two carries being disjoint. ✓

Level 4 — Synthesis

Exercise 4.1

Design a 3-bit adder for $A = 11 0_{2}$ and $B = 10 1_{2}$ by chaining three full adders. Give each column's $(C_{o u t}, S)$ and the final result.

Recall Solution

Rightmost column is bit 0. Start $C_{in} = 0$ .

Col 0: $A_{0} = 0, B_{0} = 1, C_{in} = 0$ → sum $= 1$ → $S_{0} = 1$ , carry $= 0$ .
Col 1: $A_{1} = 1, B_{1} = 0, C_{in} = 0$ → sum $= 1$ → $S_{1} = 1$ , carry $= 0$ .
Col 2: $A_{2} = 1, B_{2} = 1, C_{in} = 0$ → sum $= 2$ → $S_{2} = 0$ , carry $= 1$ .
Final carry $= 1$ .

Result $= 101 1_{2} = 11$ . Check: $11 0_{2} = 6$ , $10 1_{2} = 5$ , $6 + 5 = 11$ . ✓

Exercise 4.2

Build a half subtractor: it takes bits $A$ (minuend) and $B$ (subtrahend) and outputs Difference $D = A - B$ and Borrow $B o$ (a $1$ when you must borrow). Derive its equations from a truth table.

Recall Solution

Compute $A - B$ for all four rows. A borrow happens when $A < B$ , i.e. $A = 0, B = 1$ .

$A$	$B$	$A - B$	$B o$	$D$
0	0	0	0	0
0	1	$- 1$ (borrow)	1	1
1	0	1	0	1
1	1	0	0	0

Difference $D = 1$ when the bits differ → $D = A \oplus B$ (same XOR as the half adder's Sum!).
Borrow $B o = 1$ only at row $A = 0, B = 1$ → $B o = \overset{ˉ}{A} \cdot B$ .

Equations: $D = A \oplus B$ , $B o = \overset{ˉ}{A} B$ . Note how close this is to the half adder — only the carry/borrow logic changed from $A B$ to $\overset{ˉ}{A} B$ . See Two's complement subtraction for how real hardware subtracts using adders.

Exercise 4.3

Using Truth tables and minterms, write the sum-of-minterms (canonical) expression for the full-adder $S$ , then confirm it simplifies to $A \oplus B \oplus C_{in}$ .

Recall Solution

$S = 1$ on rows $(A, B, C_{in}) \in {001, 010, 100, 111}$ . Each row is a minterm (product where a $0$ variable is complemented): $S = \overset{ˉ}{A} \overset{ˉ}{B} C_{in} + \overset{ˉ}{A} B \overset{ˉ}{C}_{in} + A \overset{ˉ}{B} \overset{ˉ}{C}_{in} + A B C_{in} .$ Group the first two and last two: $= \overset{ˉ}{A} (\overset{ˉ}{B} C_{in} + B \overset{ˉ}{C}_{in}) + A (\overset{ˉ}{B} \overset{ˉ}{C}_{in} + B C_{in}) = \overset{ˉ}{A} (B \oplus C_{in}) + A \overline{(B \oplus C_{in})} .$ Let $X = B \oplus C_{in}$ . Then $S = \overset{ˉ}{A} X + A \overset{ˉ}{X} = A \oplus X = A \oplus (B \oplus C_{in})$ . ✓ Because XOR is associative, this is $A \oplus B \oplus C_{in}$ .

Level 5 — Mastery

Exercise 5.1

A Ripple-carry adder made of $n$ full adders has each carry pass through gate delays before the next stage can settle. If one full adder's carry path costs $2$ gate delays, and the final sum bit needs the carry to arrive first, roughly how many gate delays does an $8$ -bit ripple adder take for its most-significant bit to settle? Explain why the Carry-lookahead adder exists.

Recall Solution

The carry into stage $k$ must ripple through all $k$ earlier stages. For $8$ bits, the carry into the last stage has passed through $7$ prior carry paths, then that last stage produces its sum: $delay \approx 7 \times 2 + 2 = 16 gate delays (through carry) + final sum gate.$ Taking $\approx 2$ delays per stage across all $8$ stages, the worst-case carry chain is about $8 \times 2 = 16$ gate delays.

Why it matters: the delay grows linearly with the number of bits — a $64$ -bit ripple adder is slow. The Carry-lookahead adder computes all carries in parallel from the inputs (using "generate" $G = A B$ and "propagate" $P = A \oplus B$ signals), turning linear delay into roughly logarithmic delay. ✓

Exercise 5.2

Subtract $5 - 3$ using an adder and two's complement (4-bit). Show the steps, using full adders with $C_{in} = 1$ into the least-significant stage.

Recall Solution

Two's complement subtraction: $A - B = A + (\overline{B}) + 1$ . The " $+ 1$ " is fed in as $C_{in} = 1$ at bit 0. See Two's complement subtraction.

$A = 5 = 010 1_{2}$ .
$B = 3 = 001 1_{2}$ . Invert every bit: $\overline{B} = 110 0_{2}$ .
Add with $C_{in} = 1$ : $0101 + 1100 + 1.$
Col 0: $1 + 0 + 1 = 2$ → $S_{0} = 0$ , carry $1$ .
Col 1: $0 + 0 + 1 = 1$ → $S_{1} = 1$ , carry $0$ .
Col 2: $1 + 1 + 0 = 2$ → $S_{2} = 0$ , carry $1$ .
Col 3: $0 + 1 + 1 = 2$ → $S_{3} = 0$ , carry $1$ (final carry-out $= 1$ , discarded in 4-bit).

Result $= 001 0_{2} = 2$ . Check: $5 - 3 = 2$ . ✓ The discarded carry-out signals a non-negative result.

Exercise 5.3

Prove that the full-adder Sum output $S = A \oplus B \oplus C_{in}$ equals $1$ iff the number of $1$ s among the three inputs is odd — for all eight input rows.

Recall Solution

XOR has a key property: it flips its running result each time a fresh $1$ arrives. Start at $0$ :

$0$ ones → result stays $0$ (even) → $S = 0$ .
$1$ one → one flip → $S = 1$ (odd).
$2$ ones → two flips → back to $0$ (even) → $S = 0$ .
$3$ ones → three flips → $S = 1$ (odd).

Check all rows against the parent truth table: $S = 1$ exactly on ${001, 010, 100, 111}$ = rows with $1$ or $3$ ones (odd), and $S = 0$ on ${000, 011, 101, 110}$ = rows with $0$ or $2$ ones (even). ✓ This "parity" behaviour is precisely why the Sum is XOR and never OR.

Connections

Half adder and full adder — the parent note these exercises drill
XOR gate — the parity gate behind every Sum output
AND gate and OR gate — the carry logic
Ripple-carry adder — chained full adders (Ex 2.3, 4.1)
Carry-lookahead adder — the speedup motivated in Ex 5.1
Truth tables and minterms — the derivation method (Ex 4.3)
Two's complement subtraction — adders reused to subtract (Ex 4.2, 5.2)
Combinational circuits — the parent family