Build and analyze a voltage divider: Question bank

True or false — justify

Equal resistors always split the input voltage exactly in half.

True only when unloaded — with

R_{1} = R_{2}

the ratio

\frac{R _{2}}{R _{1} + R _{2}} = \frac{1}{2}

, but a load across

R_{2}

lowers the effective bottom resistance and breaks the symmetry, so

V_{o u t}

drops below half.

The current through

R_{1}

is larger than the current through

R_{2}

in an unloaded divider.

False — in series there is only one path, so the same current

I = \frac{V _{in}}{R _{1} + R _{2}}

flows through both; only the voltage drops differ.

Doubling both resistors (keeping their ratio) leaves

V_{o u t}

unchanged.

True —

V_{o u t}

depends only on the ratio

\frac{R _{2}}{R _{1} + R _{2}}

, which is unchanged; but the current halves, so power dissipation drops (see Ohm's Law).

The two resistor voltage drops must add up to exactly

V_{in}

True — this is Kirchhoff's Voltage Law: going around the single loop, the drops

V_{R_{1}} + V_{R_{2}}

must equal the source

V_{in}

Swapping

R_{1}

and

R_{2}

gives the same

V_{o u t}

False —

V_{o u t}

is tapped across the bottom resistor, so swapping replaces

R_{2}

with

R_{1}

in the numerator, giving

V_{in} \frac{R _{1}}{R _{1} + R _{2}}

instead — generally a different value.

A divider can supply the same current as its source if the resistors are small enough.

False — even with tiny resistors, any load current shares the path with the divider's own current and drops

V_{o u t}

; a divider is a reference, not a power supply.

Making both resistors very large is "free" because it wastes less power.

False — high resistance raises the output impedance

R_{t h} = R_{1} ∥ R_{2}

(defined above), making

V_{o u t}

more sensitive to loading and noise; it is a trade-off, not a free win.

V_{in} = 0

, then

V_{o u t} = 0

regardless of the resistors.

True — with no driving voltage there is no current (

I = 0

), so every

I \cdot R

drop is zero and

V_{o u t} = 0

Spot the error

V_{o u t} = V_{in} \frac{R _{1}}{R _{1} + R _{2}}

because

R_{1}

is drawn on top."

Wrong — the numerator is the resistor you tap across, which is

R_{2}

(to ground). Drawing order is irrelevant; the correct form is

V_{in} \frac{R _{2}}{R _{1} + R _{2}}

"To get

V_{o u t} = 3.3

V from 5 V I just need

R_{2} = 3.3 Ω

and

R_{1} = 5 Ω

Wrong logic — the ratio

\frac{R _{2}}{R _{1} + R _{2}} = \frac{3.3}{3.3 + 5} = 0.398 \neq = 0.66

. You must set the ratio to

\frac{3.3}{5}

, e.g.

R_{2} / (R_{1} + R_{2}) = 0.66

, not copy the voltages onto the resistors.

"Attaching a load across

R_{2}

raises

V_{o u t}

because the load adds resistance."

Wrong — the load

R_{L}

sits in parallel with

R_{2}

(see Series and Parallel Resistors), and parallel resistance is smaller than either branch, so effective

R_{2}

drops and

V_{o u t}

falls, not rises.

"KVL is violated because

V_{o u t}

is less than

V_{in}

Wrong —

V_{o u t}

is only the drop across

R_{2}

; the remaining drop sits across

R_{1}

. Add them and you recover

V_{in}

, so KVL holds perfectly.

"The divider's Thevenin resistance is

R_{1} + R_{2}

Wrong — looking back from the output with the source replaced by a short,

R_{1}

and

R_{2}

appear in parallel, so

R_{t h} = R_{1} ∥ R_{2}

(see Thevenin Equivalent).

"Since no load is attached, the resistors carry no current."

Wrong — the resistors always form a closed loop with the source, so the standing current

I = \frac{V _{in}}{R _{1} + R _{2}}

flows even with the output open; the load is a separate extra path.

Why questions

Why does the bigger resistor get the bigger voltage drop?

The same current flows through both, and by Ohm's law

V = I \cdot R

, so with

I

fixed the drop scales directly with

R

— bigger

R

, bigger share.

Why does only the ratio of the resistors, not their absolute size, set

V_{o u t}

V_{in} \frac{R _{2}}{R _{1} + R _{2}}

a common scaling factor cancels top and bottom; absolute size instead sets the current and thus the power and output impedance.

Why does a load "drag down" the output voltage?

The load

R_{L}

draws its own current, and the extra path in parallel with

R_{2}

lowers the effective bottom resistance, so

R_{2}

's share of the total — and hence

V_{o u t}

— shrinks.

Why is a divider poor at powering a real circuit but fine for a reference?

A reference is measured by a high-impedance input that draws almost no current, so it barely loads the divider; a real circuit draws meaningful current and collapses

V_{o u t}

Why does an Op-amp Buffer fix the loading problem?

The buffer's input draws essentially zero current, so the divider stays unloaded, while the buffer's output supplies the load current from the supply instead — decoupling the two.

Why do very high divider resistances make the output "noisy"?

High resistance means high output impedance

R_{t h}

, so tiny stray currents (leakage, EMI) produce large stray voltages, and any capacitance forms slow, noise-catching time constants.

Edge cases

What is

V_{o u t}

R_{2} = 0

(bottom resistor is a wire)?

V_{o u t} = V_{in} \frac{0}{R _{1} + 0} = 0

— the output is shorted to ground, so it sits at zero volts (and current spikes to

V_{in} / R_{1}

What is

V_{o u t}

R_{1} = 0

(top resistor is a wire)?

V_{o u t} = V_{in} \frac{R _{2}}{0 + R _{2}} = V_{in}

— the full input appears at the output because there is nothing to drop voltage before it.

What happens as

R_{2} \to \infty

(bottom resistor is an open)?

\frac{R _{2}}{R _{1} + R _{2}} \to 1

, so

V_{o u t} \to V_{in}

— with no path to ground, no current flows, no drop across

R_{1}

, and the output floats up to the input.

What happens as the load

R_{L} \to 0

(dead short at the output)?

R_{2} ∥ R_{L} \to 0

, so

V_{o u t} \to 0

— the short pins the output to ground no matter what

R_{2}

was.

What happens as the load

R_{L} \to \infty

(no load at all)?

R_{2} ∥ R_{L} \to R_{2}

, recovering the ideal unloaded

V_{o u t} = V_{in} \frac{R _{2}}{R _{1} + R _{2}}

— an infinite load draws no current and doesn't disturb the divider.

If both

R_{1}

and

R_{2}

are zero, what does the formula say and is it physical?

\frac{0}{0}

is undefined — physically it's a wire directly shorting the source, so the divider model breaks down and current is limited only by real wire resistance.

When are two stacked dividers equivalent to a Wheatstone Bridge reading zero?

When both dividers have the same ratio

\frac{R _{2}}{R _{1} + R _{2}}

; their output nodes then sit at equal voltage, so the bridge is balanced and reads zero difference.

Connections

Ohm's Law — the traps about "bigger $R$ , bigger drop" all reduce to $V = I R$ with the current fixed; use it to justify any answer about how a drop scales.
Series and Parallel Resistors — needed to see why a load $R_{L}$ lowers the effective bottom resistance: the load is in parallel with $R_{2}$ , and parallel is always smaller.
Kirchhoff's Voltage Law — the backbone of every "the drops must sum to $V_{in}$ " trap; if your answer seems to violate it, you mislabelled a node.
Thevenin Equivalent — explains the $R_{t h} = R_{1} ∥ R_{2}$ trap: short the source and the two resistors face the output in parallel, which is what "output impedance" means here.
Op-amp Buffer — the practical fix for the loading traps; know it as the reason real designs put a buffer after a divider.
Wheatstone Bridge — extends the divider to two dividers compared, which is the setup behind the balanced-bridge edge case.