Visual walkthrough — FPGA-based acceleration
This is the beating heart of FPGA-based acceleration: an FPGA is fast not because its clock is fast, but because it can lay out a spatial pipeline and keep it full. Let us earn that result from zero.
Step 1 — What is a "stage"? (the assembly line picture)
WHAT. Imagine building a toy car. The work splits into 3 jobs: (1) attach wheels, (2) paint, (3) box it. Each job sits at its own station. A worker at a station does only that one job, forever.
WHY. A CPU is one worker doing all three jobs on one car before touching the next — one person, three tools, lots of walking. A pipeline is three workers, each glued to one station, passing the car down the line. This "one station per job" idea is exactly what an FPGA does in silicon: one physical circuit per operation. We split work into stages so each station can work on a different car at the same moment.
PICTURE. Below, the three stations sit in a row. A car enters the left, exits the right. Right now only station 1 is busy — the pipe is still empty behind it.

Step 2 — What is a "clock tick"? (the drumbeat)
WHAT. Every station passes its car to the next station at the same instant — on a shared drumbeat. That beat is the clock. The time between two beats is the clock period, written .
WHY. All stations must hand off together, or a half-finished car would collide with the next one. So the drum can only beat as fast as the slowest station can finish its job. If painting takes longest at seconds, then
- — seconds between beats (the clock period). Smaller = faster clock.
- — the time the slowest stage needs. It sets the pace; a chain is only as fast as its slowest link.
PICTURE. Three stations with little stopwatches. Painting (station 2) is the slow one, so its stopwatch defines the drumbeat for everyone.

Step 3 — The naive way: no pipeline (one car at a time)
WHAT. First, count time the slow way — no assembly line. One car goes through all stations, start to finish, before the next car even enters.
WHY. We need a baseline to compare against. This is how a CPU would do it: finish item 1 completely, then item 2, and so on. We call the number of items .
The count, term by term. One item takes stages, each costing one beat , so one item = . Do that for all items:
- — how many data items (cars) we push through.
- — stages per item (each item still needs all of them).
- — seconds per stage.
- The product = total stage-visits; times = total seconds.
PICTURE. A tall stack of cars waiting. Car 2 cannot start until car 1 has left all three stations. Two of the three stations sit idle at any moment — wasted workers.

Step 4 — The pipeline trick: overlap the cars
WHAT. Now let every station stay busy. The moment car 1 leaves station 1, car 2 enters station 1 — while car 1 is at station 2. The cars overlap in time.
WHY. Those idle workers from Step 3 were the waste. Overlapping means all stations are working on different cars once the line is full. This is the whole idea: fill the pipe, then never let a station idle.
PICTURE — the space-time chart. This is the key diagram. Rows = stations, columns = clock ticks. Each colored block is one car occupying one station for one tick. Read the diagonal stripes: each car marches down-right, one station per tick. After the pipe fills, every column is fully colored — every station busy every tick.

Step 5 — Count the pipelined time (fill, then one-per-tick)
WHAT. Count the ticks in the diagram of Step 4. Two phases: filling the pipe, then draining one result each tick.
WHY. The first result is not free — car 1 must still crawl through all stations before any car finishes. That is the fill cost. But every car after the first pops out just one tick later, because they are all overlapped.
The count, built up.
Filling the pipe (first result exits): it takes ticks for car 1 to pass all stations.
The remaining cars each finish exactly one tick after the car before it (they are overlapped by exactly one beat):
Each tick is seconds, so:
- — the one-time fill cost (ticks before the first result appears).
- — the extra ticks, one for each item after the first.
- — seconds per tick, multiplying the whole tick count into seconds.
PICTURE. The same chart, now with the two phases shaded: a pale-yellow "fill" triangle of length on the left, then a chalk-blue "steady state" where results drip out one per column.

Step 6 — The speedup, and why it heads toward
WHAT. Divide the naive time (Step 3) by the pipelined time (Step 5).
WHY. Speedup is "how many times faster" — old time over new time. This single ratio tells us whether the whole exercise was worth it.
The algebra, term by term.
The 's cancel (same clock in both) — pipelining is not about a faster clock:
- Numerator — the total work (item-stage visits).
- Denominator — the actual ticks we paid.
- Their ratio = useful-work-per-tick vs one-tick-of-clock.
Now push (the batch size) toward infinity. Divide top and bottom by :
- — the fill cost spread over items. As grows, this shrinks to .
- What remains is just : a full speedup.
PICTURE. A curve of speedup vs : it starts near (tiny batch, all fill), climbs, and flattens as it hugs the dashed ceiling line at .

Step 7 — Edge cases: the corners where intuition slips
WHAT. We must check the small and degenerate inputs, or the reader will trust the formula where it lies.
WHY. A formula you cannot break is a formula you cannot trust. Four corners:
(a) One item, . Plug in: . No speedup at all! With a single car, the pipeline is pure fill — you pay the full ticks and gain nothing. This is latency vs throughput: latency for one item is unchanged.
(b) One stage, . . Nothing to overlap — one station is already the whole job. Pipelining needs to help.
(c) Zero items, . Time — the pipe drains the leftovers already inside, but the naive time is . Speedup is undefined (); physically, "no work, no win." Guard against dividing by an empty batch.
(d) Unbalanced stages. If one stage is far slower, is dragged up by that stage and every other station idles part of each tick. The formula still holds, but the clock is bad. The real-world fix is balancing — splitting the slow stage so no station dominates .
PICTURE. Four mini-panels, one per corner: single car (all fill), single station (no overlap), empty batch, and a lopsided line where the fat slow station stalls the drum.

Step 8 — Put real numbers in (the parent's example, checked)
WHAT. Use stages, items, clock MHz so ns.
WHY. A formula must survive contact with numbers.
Naive baseline at ns per op, ops per item:
We landed a hair below the ceiling — exactly the fill toll we predicted in Step 6. The picture and the algebra agree.
Recall Say the whole limit in one line
What is and why? ::: It is ; the one-time fill cost spreads over items and vanishes, leaving the full stage count as the achievable speedup. With , what is the speedup? ::: Exactly — a single item is pure fill, no overlap to exploit.
The one-picture summary
This final chalkboard compresses the whole story: the naive stack (workers idle) versus the overlapped pipeline (all workers busy), the fill triangle of cost , the steady state dripping one result per tick, and the speedup curve climbing to its ceiling at .

Recall Feynman retelling — explain it to a friend with no math
Imagine building toy cars. The slow way: one worker builds a whole car — wheels, paint, box — then starts the next. Three cars = nine slow jobs done one after another.
The pipeline way: three workers, each glued to one station. The instant car 1 leaves the wheel station, car 2 rolls in. Soon all three workers are busy on three different cars at once. After that, a finished car pops out on every drumbeat.
There's a catch at the start: the very first car still has to crawl through all three stations before anything comes out — that's the "fill." You pay that toll once. But over a thousand cars, paying it once is nothing. So a three-station line, over a long run, cranks out cars almost three times faster than the lone worker — and a twelve-station line, almost twelve times. The magic number is just how many stations you have, — not how fast the drum beats. That is why a slow-clocked FPGA with a deep pipeline flattens a fast CPU: it finishes one whole computation's worth of work on every single tick.
Related build-up: Pipelining and Throughput · Configurable Logic Blocks (LUTs & Flip-Flops) · Dataflow architectures · Roofline Model & Arithmetic Intensity · GPU vs FPGA vs ASIC trade-offs