Before you can read the parent note comfortably, you need to earn every symbol it throws at you. This page takes each one from zero: what it means in plain words, the picture it draws, and why the topic can't do without it.
Picture two light-switches wired so the bulb glows only if you flip both: that is an AND gate. Every digital chip — CPU, GPU, FPGA — is millions of gates wired together.
Look at the square wave above. The gap between two rising edges is T (measured in seconds). If T=5 nanoseconds, the chip ticks 200 million times a second — that's what "200 MHz" means.
Why the topic needs T: every speed claim in the parent note multiplies a count of cycles by T to get real time in seconds. T is the bridge between "how many ticks" and "how many microseconds".
Recall Why is a smaller
T a faster clock?
Smaller gap between ticks ::: more ticks per second ::: higher frequency f=1/T.
The parent note names four hardware pieces. Here is each one as a picture.
The figure shows a 2-input LUT storing the truth table of an AND gate. The four input combinations 00, 01, 10, 11 are the four addresses; the stored column 0,0,0,1is the function. Change the stored column and the same LUT becomes an OR, a XOR — any function of 2 inputs.
Picture a camera that takes exactly one photo per tick and shows that photo until the next tick. Flip-flops are how the assembly line (pipeline) holds each stage's partial result until the next tick moves it along.
Picture a notepad on your desk (BRAM) versus a filing cabinet down the hall (DRAM). Keeping data on the notepad is why the topic later says "raise arithmetic intensity" — see §5.
The parent note's worked example uses y[n]=∑k=0K−1ckx[n−k]. Let's earn every piece.
For K=3:
∑k=02ckx[n−k]=c0x[n]+c1x[n−1]+c2x[n−2].
x[n] = the input sample at time-step n (square brackets mean "the n-th item in a stream").
x[n−1] = the sample one step earlier; x[n−k] = k steps earlier.
ck = a fixed weight (a "tap coefficient"). K = how many taps.
Why the topic needs ∑: it compresses "K multiply-adds" into one symbol so the note can talk about doing all K of them in the same cycle instead of one after another.
Recall In
∑k=0K−1, how many terms are added?
From k=0 to k=K−1 inclusive ::: exactly K terms.
These four letters drive every speed formula in the topic.
The figure shows a 3-stage pipeline (S=3) as a grid: columns are cycles (time), rows are stages. Watch item 1 (yellow) enter stage 1, move to stage 2 next tick, stage 3 the tick after — it exits after S=3 ticks. But item 2 (green) is right behind it, so after the pipe fills, a finished result drops out every tick.
Why the topic needs these: the parent note's speedup S+M−1MS is built entirely from S, M, and the cancelled T. You cannot read that formula without knowing what each letter pictures.
Recall Why does throughput ≠ latency?
Latency = time for the first result (S cycles) ::: throughput = rate of results after fill (1 per cycle); for large M the rate dominates.
Two mathematical tools sneak into the topic. Here's why each, and not another.
For K=8: pair into 4, then 2, then 1 → 3 levels, and indeed log28=3. Why this tool: it counts pipeline levels in the FIR adder tree — you need a log, not a multiply, because each level halves the count.
Applied to speedup: S+M−1MS. Divide top and bottom by M: 1+(S−1)/MS. As M→∞ the term (S−1)/M→0, leaving S. Why this tool: it makes precise the claim "an S-stage pipeline approaches an S× speedup" without hand-waving.
Read top to bottom: the clock and flip-flops feed the pipeline maths; gates and LUTs feed the building blocks; BRAM feeds the roofline; sums and logs feed the FIR example — all four streams pour into the topic.
