RISC-V extensions (M, A, F, D, V, C): Exercises — Hinglish deep dive

5.1.8 · D4 · Hardware › Instruction Set Architecture (ISA) › RISC-V extensions (M, A, F, D, V, C)

Ye graded problems RISC-V extensions (M, A, F, D, V, C) material ko test karte hain. Har level deeper jaata hai: L1 mein tum sirf pieces ko pehchaante ho, L5 tak tum kuch build karte ho. Har problem ka ek full worked solution fold karke rakha hai — pehle khud try karo, phir unfold karo.

Shuru karne se pehle, ek reminder notation ka jo neeche har jagah use hogi:

Agar koi line unfamiliar lage toh prerequisites yahan hain: 5.1.07-RISC-V-base-ISA, 5.2.03-IEEE-754-floating-point, 3.3.06-Instruction-encoding, 6.4.02-Cache-coherence-protocols.

Level 1 — Recognition

Recall Solution L1.1

Har mnemonic ki shape dekho:

MULHU — ek multiply → M extension.
sc.w — store-conditional, ek atomic → A extension.
FADD.S — .S suffix ka matlab single-precision → F extension.
FLD — ek double load (.D family, FLD mein woh D) → D extension.
amoadd.w — atomic memory operation → A extension.
DIVU — unsigned divide → M extension.

Pehchaan: MUL/DIV/REM ⇒ M. LR/SC/AMO ⇒ A. .S ⇒ F. .D ⇒ D.

Recall Solution L1.2

Sign = 1 bit, exponent = 8 bits, mantissa = 23 bits. Total $1 + 8 + 23 = 32$ ✓.
Bias $= 2^{8 - 1} - 1 = 127$ .

Level 2 — Application

Recall Solution L2.1

0x00010000 $= 2^{16} = 65536$ . Product $= 2^{16} \times 2^{16} = 2^{32} = 0x0000000100000000$ (ek 64-bit value).

MUL lower 32 bits [31:0] leta hai $=$ 0x00000000 $= 0$ .
MULHU upper 32 bits [63:32] leta hai $=$ 0x00000001 $= 1$ .

Isliye do instructions exist karte hain: 32-bit result register ek 64-bit product hold nahi kar sakta, toh answer split hota hai.

Recall Solution L2.2

Hex ko binary mein likho, 4 bits per digit: 0100 0000 0100 1001 0000 1111 1101 1011.

Sign = bit 31 = 0 → positive, $(- 1)^{0} = + 1$ .
Exponent = agle 8 bits 1000 0000 $= 128$ . Real exponent $= 128 - 127 = 1$ .
Mantissa = last 23 bits 100 1001 0000 1111 1101 1011. Iska fractional value hai: $frac = \frac{0x490FDB}{2 ^{23}} = \frac{4788187}{8388608} \approx 0.5707963.$
Value $= (+ 1) \times (1 + 0.5707963) \times 2^{1} = 1.5707963 \times 2 \approx 3.1416$ .

Yeh $π$ hai — 0x40490FDB $π$ ki standard single-precision encoding hai.

Level 3 — Analysis

Recall Solution L3.1

Same bits, do interpretations.

Signed (MULH): 0xFFFFFFFF = $- 1$ , 0x00000002 = $+ 2$ . Product $= - 1 \times 2 = - 2$ . 64-bit two's complement mein $- 2 = 0xFFFFFFFFFFFFFFFE$ . Upper 32 bits [63:32] = 0xFFFFFFFF (sab sign bits).

Unsigned (MULHU): 0xFFFFFFFF = $2^{32} - 1 = 4294967295$ , 0x00000002 = $2$ . Product $= 8589934590 = 0x00000001FFFFFFFE$ . Upper 32 bits = 0x00000001.

Alag kyun hain: multiply hone wale bits identical hain, lekin signed math 0xFFFFFFFF ko ek chhota negative number maanta hai, jabki unsigned math use ek bada positive number maanta hai. Low 32 bits (0xFFFFFFFE) same nikle, lekin high halves bilkul alag hain.

Worked example L3.2 — LR/SC ko retry kyun karna padta hai

Is loop ko trace karo jab ek doosra core (a0) par hamare lr.w ke baad lekin sc.w se pehle write karta hai. sc.w kya return karta hai, aur phir kya hota hai?

retry:
    lr.w  t0, (a0)
    addi  t1, t0, 1
    sc.w  t2, t1, (a0)
    bnez  t2, retry

Recall Solution L3.2

lr.w t0, (a0) counter load karta hai aur us address par hamare core ke liye ek reservation rakhta hai.
Doosra core same cache line par write karta hai. Coherence protocol (dekho 6.4.02-Cache-coherence-protocols) ek invalidation bhejta hai → hamaari reservation clear ho jaati hai.
sc.w t2, t1, (a0) reservation check karta hai, use invalid paata hai, isliye woh store nahi karta aur t2 = 1 (failure) set karta hai.
bnez t2, retry dekhta hai t2 ≠ 0 aur retry par jump karta hai, ab-updated value phir se padhta hai.

Guarantee: ek store tabhi land karta hai jab beech mein kisi ne address touch na kiya ho, isliye koi bhi increment kabhi lost nahi hota. Success ⇒ t2 = 0; failure ⇒ t2 = 1.

Level 4 — Synthesis

Recall Solution L4.1

retry:
    lr.w  t0, (a0)        # t0 = current value, reserve address
    bge   t0, a1, done    # if current >= a1, nothing to do
    sc.w  t2, a1, (a0)    # try to store a1
    bnez  t2, retry       # store failed? someone raced us -> retry
done:

Step by step reasoning:

lr.w read aur reserve karta hai.
bge t0, a1, done — agar existing value pehle se badi hai, toh store skip karte hain (store sirf ek reservation waste karta).
Warna sc.w write attempt karta hai; failure ⇒ fresh value ke saath retry.

Single instruction equivalent: amomax.w t0, a1, (a0) — atomically mem[a0] read karta hai, max(old, a1) write karta hai, aur old value t0 mein return karta hai. Yeh ek hardware-locked operation hai 4-instruction loop ki jagah, isliye faster hai aur livelock nahi kar sakta.

Recall Solution L4.2

Unpack (dekho 5.2.03-IEEE-754-floating-point):
- $3.0 = 1. 1_{2} \times 2^{1}$ → exp $= 127 + 1 = 128$ , mantissa $= .1$
- $0.5 = 1. 0_{2} \times 2^{- 1}$ → exp $= 127 - 1 = 126$ , mantissa $= .0$
Align bade exponent ( $2^{1}$ ) par: $0.5$ ka mantissa $1 - (- 1) = 2$ places right shift karo: $0.5 = 0.0 1_{2} \times 2^{1}$ .
Mantissas add karo: $1.1 0_{2} + 0.0 1_{2} = 1.1 1_{2}$ → value $1.75 \times 2^{1} = 3.5$ .
Normalize: $1.1 1_{2}$ mein pehle se ek bit point se pehle hai — ho gaya.
Pack: sign $= 0$ , exp $= 128 = 1000 0000_{2}$ , mantissa $= 1100000 \dots$ (implicit 1 ke baad .11). Bits: 0 10000000 11000000000000000000000 = 0x40600000.

Check: $0 x 40600000$ decode hota hai $+ 1.75 \times 2^{1} = 3.5$ ✓.

Level 5 — Mastery

Recall Solution L5.1

Single precision mein 23-bit mantissa plus 1 implicit bit = 24 significant bits hote hain.

$2^{24} = 16777216$ . Iske upar agle representable single-precision number $2^{24} + 2$ hai, na ki $2^{24} + 1$ , kyunki is magnitude par representable values ke beech spacing (ULP) $2^{24 - 23} = 2$ hai.
$1.0$ add karna exactly halfway land karta hai; round-to-nearest-even neeche $2^{24}$ ki taraf round karta hai.
Result: sum 16777216.0 hi rehta hai — +1 gayab ho gaya.

Double precision: 52+1 = 53 significant bits. $2^{24}$ magnitude par ULP $2^{24 - 52} = 2^{- 28} \approx 3.7 \times 1 0^{- 9}$ hai, jo 1 se bahut neeche hai, isliye $16777216 + 1 = 16777217$ exactly represent hota hai. Isliye hi laakhon values ka sum karte waqt ek double accumulator use karte hain.

Recall Solution L5.2

a = 0x80000000 signed $= - 2^{31} = - 2147483648$ . b = 3 unsigned. True product $= - 2^{31} \times 3 = - 6442450944$ .

64-bit two's complement mein: $- 6442450944 = 2^{64} - 6442450944 = 0xFFFFFFFE80000000$ .

MUL = low 32 bits [31:0] = 0x80000000.
MULHSU = high 32 bits [63:32] = 0xFFFFFFFE (signed×unsigned high half).

Reconstruct: $2^{32} \cdot 0xFFFFFFFE + 0x80000000$ . 0xFFFFFFFE ko signed $- 2$ padho: $2^{32} \times (- 2) + 2^{31} = - 8589934592 + 2147483648 = - 6442450944 ✓$ Exactly true product. MULHSU yahan sahi variant hai kyunki pehla operand signed hai aur doosra unsigned.

Recall Solution L5.3

Integer scaling ×100 = multiply ⇒ M chahiye.
Ek shared counter jo do concurrent tasks touch karte hain ⇒ atomic increment ⇒ A chahiye.
"No fractional math" ⇒ F aur D chhod do (FPU woh silicon/power hai jo tum kharch nahi karte).
Base integer ISA hamesha present rehta hai: I.

ISA string: RV32IMA. Tum FPU area/energy bachate ho — yahi RISC-V modularity ka point hai: sirf wahi pay karo jo application use karta hai. (C compressed code size ke liye add ho sakta hai, lekin problem ne require nahi kiya.)

Recall Self-test summary

M ek wide product ko MUL (low) + MULH (high) mein split karta hai — kaun sa variant? ::: Woh jo operand signedness se match kare: MULH signed×signed, MULHU unsigned×unsigned, MULHSU signed×unsigned. sc.w kabhi kabhi 1 kyun return karta hai? ::: Uski reservation doosre core ki write se invalidate ho gayi — yeh normal contention hai, isliye retry karo. Do floats add karte waqt kya exponents add karte hain? ::: Nahi — tum common (bade) exponent par align karte ho chhote mantissa ko shift karke; exponents add karna multiply ke liye hota hai. $2^{24}$ + 1, single precision mein $2^{24}$ hi kyun raha? ::: Us magnitude par ULP 2 hai, isliye +1 nearest-even round karke neeche jaata hai; double ke paas exactly represent karne ke liye kaafi bits hain.