2.4.6 · D5
Question bank — BJT biasing techniques
True or false — justify
Fixed-bias has a constant , therefore its is also constant across transistors.
False. is indeed fixed by and , but rides directly on — swap to a higher- chip and climbs even though never moved.
A larger stability factor means a more stable Q-point.
False. measures how much moves per unit of unwanted change — the ideal is , and fixed bias' is the worst, not the best.
In voltage-divider bias the emitter resistor makes perfectly independent of .
False — only approximately independent. The exact still holds a term; it merely vanishes when we design .
For the divider bias DC load line, the collector loop equation is .
False. The emitter current also drops voltage across , and since the correct relation is .
Collector-to-base (feedback) bias uses negative feedback, so it must be as stable as voltage-divider bias.
False. It does self-correct, but its feedback depends on and values and never fully removes ; the divider with generally pushes closer to 1.
Putting the Q-point right at gives the biggest output swing.
False. At the transistor is near cutoff, so the upward swing has almost no room and clips immediately; maximum symmetric swing needs a Q-point near the middle of the load line.
is always slightly less than 1.
True. Since (the base steals a little current), is just under unity, e.g. gives .
The negative feedback that stabilizes the Q-point in divider bias comes for free with no downside.
False. The same feedback (especially in collector-feedback bias, and if un-bypassed) also reduces AC voltage gain — see Small-signal amplifier analysis and Negative feedback.
Spot the error
"To improve fixed-bias stability, just make very large."
Wrong direction. A larger lowers and but leaves the relation intact — the Q-point still tracks one-for-one. You must add feedback (an or collector feedback), not resize .
"In collector-feedback bias, the current through is just ."
Wrong. The base resistor taps off the collector node, so the current through is ; forgetting mis-writes the base loop KVL.
"For the divider, ."
The ratio is inverted. is the voltage across (the leg to ground), so .
" for the divider is ."
No. With the supply shorted (Thévenin resistance procedure), and appear in parallel: .
"Make the divider current huge, ten thousand times , for maximum stability."
Overkill that wastes power and loads the supply. The rule of thumb is divider current — enough that the base draw barely disturbs ; far beyond that gives negligible extra stability.
" is a fixed constant, so temperature is irrelevant to the Q-point."
Wrong. actually drifts about , and rises with heat; good biasing exists precisely to absorb these — see Temperature effects in semiconductors.
"Emitter (dual-supply) bias needs no emitter resistor because it already has two supplies."
Wrong. The is exactly what sets and provides the -independence; the second supply just gives a clean reference so the base can sit near ground.
Why questions
Why does adding stabilize even though it seems to do nothing to ?
Because rising raises , which lifts the emitter voltage and shrinks ; a smaller cuts and hence — a self-limiting Negative feedback loop that resistors, not , ultimately govern.
Why do we bother Thévenin-izing the divider instead of analyzing and directly?
Thevenin's theorem collapses the two-resistor divider into one source and one resistance , so the base loop becomes a single clean KVL equation instead of a messy node with two branches.
Why is fixed bias called the "worst" scheme even though it uses the fewest parts?
Its stability factor is , the maximum possible — any change in or transfers almost fully to , so the Q-point wanders freely with temperature and device spread.
Why must a linear amplifier live in the active region and not cutoff or saturation?
Only in the active region (BJT operating regions) is a faithful amplified copy of the base signal (); in cutoff the output is stuck near and in saturation near , so signal peaks flatten and distort.
Why does the factor appear when we reflect into the base loop?
The emitter carries , so the voltage seen in the base loop looks, per unit of , like a resistance of — that is why dominates and becomes negligible.
Why does a Q-point near the load-line centre matter for AC signals?
The AC output swings symmetrically about ; centring on the DC load line and Q-point gives equal headroom up (toward cutoff) and down (toward saturation), maximizing undistorted swing.
Why do FET biasing schemes differ from BJT ones despite the same goal?
A FET is voltage-controlled with essentially no gate current, so there is no and no base loop; the stabilizing tricks (e.g. self-bias with a source resistor) parallel in spirit but use – behaviour — see FET biasing techniques.
Edge cases
What happens to divider bias if ?
The stabilizing feedback disappears: now depends on again, so you lose the very -independence that made divider bias worthwhile.
What is the fixed-bias stability factor if a transistor had ?
: any tiny disturbance in leakage or base current would blow up without bound — the extreme illustration of why fixed bias is unusable when is large or uncertain.
In the divider approximation, what is the limit of as grows very large?
It tends to , leaving — so higher actually makes the approximation better, not worse.
If (say ), what state is the transistor in?
Cutoff — there is not enough base-emitter forward voltage to turn the junction on, so and the device conducts negligibly regardless of .
In collector-feedback bias, what does approach if ?
The feedback vanishes: , which is just the fixed-bias result — with no drop across the collector can no longer "report back" to the base, so stability degrades to the worst case.
What happens to at the exact saturation edge of the load line?
falls to and maxes at roughly ; push further and can no longer grow, so amplification stops and the output clips.
If the divider current is chosen equal to (not ), what goes wrong?
The base then draws a comparable share of the divider current, so sags below its no-load value and becomes -dependent — the stiff, predictable base voltage the design relied on is lost.
Recall One-line summary of every trap here
Almost every mistake reduces to one of three slips: (1) confusing " fixed" with " fixed" — forgetting ; (2) using the wrong loop equation — dropping or where they belong; (3) misreading stability — believing bigger or an edge-of-load-line Q-point is good.