5.5.28 · D3Embedded Systems & Real-Time Software

Worked examples — MIL-STD-1553 — military avionics bus

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This is the "roll up your sleeves" page for MIL-STD-1553 — military avionics bus. Every timing number, every fault case, every degenerate input the standard can throw at you — we work them all here, from zero. If a symbol shows up, we define it first.


The scenario matrix

Before working examples, let us list every kind of situation this topic can put in front of you. Think of it as a checklist: by the end, every row has at least one fully-worked example.

# Case class What makes it tricky Covered by
A Bus timing — normal message add up sync/data/gap correctly Ex 1
B Word-count boundary (0 encodes 32) the "zero means max" trap Ex 2
C Bus utilisation / limiting value fraction, must be < 100% Ex 3
D Response-time window (min & max edge) RT too slow → error, RT too fast → also illegal Ex 4
E Differential signalling with noise (common-mode AND differential) positive noise, negative noise, and noise that does NOT cancel Ex 5
F Manchester clock-drift limit (degenerate: all-0 / all-1) worst case string, why edge still appears Ex 6
G Redundancy probability (limiting: p→0, p→1) multiplying probabilities, sanity bounds Ex 7
H Real-world word problem (schedule a whole minor frame) many messages, deadline Ex 8
I Exam twist (retry inflates worst-case latency) the case people forget Ex 9
J Passive diagnosis from a Bus Monitor trace infer the fault, transmit nothing Ex 10

Ten rows, ten examples. Let us define the two symbols we will reuse everywhere.


Example 1 — Case A: a normal transmit transaction

Forecast: Guess now — is the answer closer to , , or ? Write it down.

The pieces of a BC-reads-from-RT transaction, in order. Figure s01 is a timeline: the horizontal axis is time in microseconds (0 to about 108), and each coloured rectangle is one block of bus activity occupying its width in time (there is no vertical/value axis — height is purely for labelling). Left to right you see a blue command block (20 μs wide), a thin gray response gap (8 μs), an orange status block (20 μs), then three green data blocks (20 μs each), and a red double-arrow spanning the whole thing labelled "Total = 108 us." Follow the blocks left to right as you read the steps.

Figure — MIL-STD-1553 — military avionics bus
  1. Command word (BC → RT): 1 word. In the figure, this is the leftmost blue block. Why this step? The BC must first announce "RT #7, transmit 3 words." Nothing on the bus happens without a command. That is 1 word .
  2. Response gap: . The thin gray block after the command. Why this step? The RT is not instant. The standard gives it a response-time window (nominally 4–12 ) to wake up and start replying. "Middle of the window" .
  3. Status word (RT → BC): 1 word . The orange block. Why this step? The RT must acknowledge and report health before data. This is mandatory even on a clean read.
  4. 3 data words (RT → BC), back-to-back, no gaps: . The three green blocks with no gaps between them. Why this step? Data words follow the status word immediately — gaps here would waste deterministic bus time.

Total:

Verify: Count the words on the wire = 1 + 1 + 3 = 5 words , plus one gap = . ✓ Units are all , and (the parent note's 8-word example), which makes sense: fewer data words → shorter. Forecast check: closest to side, so "about a hundred" was the right ballpark.


Example 2 — Case B: the word-count-zero trap

Forecast: Zero words? Or something else?

  1. Read the field literally: it says 0. Why this step? Always start from the raw bits.
  2. Apply the 1553 encoding rule. The word-count field is 5 bits, so it can hold values to . But a message needs to carry 1 to 32 words. That is 32 possibilities, and 5 bits give exactly 32 codes. The standard maps them as: values mean "that many words," and the value is reused to mean 32. Why this step? Because you cannot fit 33 meanings (0 through 32) into 32 codes — so "0 real words" is meaningless anyway (why send an empty message?), and the code is recycled for the useful maximum, 32.
  3. Therefore Word Count = 0 means 32 data words.

Data-word time:

Verify: bits → codes, and we need to name which is also 32 items. A perfect bijection, so no code is wasted. ✓ . ✓


Example 3 — Case C: bus utilisation (a limiting fraction)

Forecast: Under 1%, a few percent, or over 50%?

  1. How much bus time is available per second? Why this step? "Utilisation" = time-used ÷ time-available. One second .
  2. How much does one update cost? One transaction .
  3. How many updates per second? .
  4. Time used per second:
  5. Utilisation:

Verify: The parent note claims "1.5% bus utilisation" for a 50 Hz sensor read — same ballpark; the small difference is because they rounded to per read rather than exactly 208. Sanity bound: must satisfy , and sits comfortably inside. ✓ Units: = dimensionless. ✓


Example 4 — Case D: both edges of the response-time window

Forecast: Only the too-slow one is a problem, right? Guess before reading.

We must check both boundaries — this is why Case D is on the matrix.

  1. RT (a): replies at . Why check? , so it is too fast — before the minimum. The BC's receiver may not yet be listening; this is a timing violation. Illegal.
  2. RT (b): replies at . Why check? . Inside the window. Legal.
  3. RT (c): replies at . Why check? , past the maximum. The BC declares a no-response timeout and treats the message as failed.

BC action on (a) and (c): the message is marked errored; the BC will retry (typically up to 3 attempts, see Ex 9). If retries also fail, the BC may switch to the other bus.

Verify: The legal interval is the closed set . Membership: , , . ✓ Both a lower and an upper violation are covered — that is the "every case" requirement for a window.


Example 5 — Case E: differential signalling, common-mode AND differential noise

Forecast: Does the huge common-mode spike destroy the bit? And can differential noise — noise that is different on each wire — ever threaten the reading?

Figure s02 is a voltage-versus-time plot: the horizontal axis is time (arbitrary units, 0 to 4) and the vertical axis is voltage in volts (from about to ). The blue curve is noisy wire A ( plus a common-mode bump), the orange curve is noisy wire B ( plus the same bump, so it rides up and down in lockstep with blue), the thick green curve is their difference pinned flat at , and the red dashed horizontal line marks the threshold. The green line staying perfectly flat while blue and orange wobble is the whole point of Part 1 — watch it ignore the bump.

Figure — MIL-STD-1553 — military avionics bus

Part 1 — common-mode noise (the noise cancels).

  1. Write the receiver's measurement. With equal noise on both wires, and : Why this step? The two terms cancel algebraically — the answer no longer depends on at all. This is the magic exploited by twisted pair (see RS-485 Protocol).
  2. Plug each noise value: (i) . (ii) → still . (iii) → still . Why this step? To show positive, negative, and enormous common-mode noise all give the identical clean reading.
  3. Compare to threshold: , so all three read logic 1. No bit flips. This is the green line in the figure, unmoved by the bump.

Part 2 — differential noise (the noise does NOT cancel).

  1. Write the measurement with unequal noise. Now and : Why this step? Because the noise is different on each wire ( vs ), it survives the subtraction — this is the one noise type differential signalling cannot reject.
  2. Interpret. Here the differential noise happened to push us further from the threshold (), so the bit is still safe. But if it had subtracted from the difference instead (), we would be creeping toward the wall. Why this step? To make the honest point: differential signalling is a shield against common-mode noise only. Twisting the pair tightly is what keeps real-world noise common-mode (both wires see the same interference).

Verify: Part 1 — for every , all ✓. Part 2 — , and this depends on the noise (it did not cancel), confirming differential noise is the residual threat. ✓


Example 6 — Case F: Manchester worst-case drift (degenerate input)

Forecast: With 100 identical bits, does Manchester really keep giving edges?

The degenerate input (all bits the same) is exactly where naive encodings fail — that is why it is on the matrix.

  1. Recall the Manchester rule. Every bit period has a mid-bit transition (logic 0 = HIGH→LOW at the centre). See Manchester Encoding. Why this step? Because the transition is guaranteed per bit, "all zeros" cannot suppress it.
  2. Longest gap without an edge. Within a single bit of length , the guaranteed edge sits at the centre, from each end. The worst run without any edge is therefore: Why this step? Even 100 zeros give you an edge every — the PLL (phase-locked loop, the circuit that re-syncs the clock) never loses lock.
  3. NRZ comparison. In NRZ, a "0" is just a steady level. 100 zeros with zero transitions. Why this step? To make the payoff concrete: vs is a improvement in edge density.

Verify: regardless of how long the run is (100, 1000, or a million zeros). ✓ NRZ gap and . ✓ Degenerate case handled: the all-same-bit input is the worst case and Manchester still passes.


Example 7 — Case G: dual redundancy, limiting values of

Forecast: Is the improvement roughly , , or ?

  1. Independent failures multiply. Comm is lost only if both buses fail: . Why this step? "Independent AND" multiplies probabilities — a core probability rule, and the whole justification for two buses.
  2. (a) Plug :
  3. (b) Limits.
    • : . Good — perfect buses give perfect availability.
    • : . Also correct — if each bus always fails, two of them still always fail. Redundancy cannot save you from certain failure. Why this step? Checking limits catches a nonsense formula: any valid probability must stay in and behave sensibly at the ends. does.
  4. (c) Improvement factor:

Verify: ✓. Bounds: for ✓. Improvement matches the parent note. ✓ This meets DO-178C Certification Level A availability; a third bus would only take you to — diminishing returns for the added weight.


Example 8 — Case H: schedule a whole minor frame (real-world)

Forecast: Comfortably fits, just barely fits, or overflows?

  1. Engine read (transmit, 4 data words). Command + gap + status + 4 data: Why this step? Same recipe as Example 1, with 4 data words instead of 3.
  2. Weapons write (receive, 2 data words). For a receive, the BC sends command and the 2 data words, then the RT replies with a status word after the gap: Why this step? On a write, data flows BC→RT alongside the command; the status word comes back last. Order differs from a read, but the word-count is what drives the time.
  3. Sum the frame:
  4. Fit check. Deadline . Since , it fits, with slack .
  5. Utilisation:

Verify: Word counts on the wire: nav 10, radar 10, engine 6, weapons 4 → 30 words ; gaps: 4 ; total . ✓ , well under 100%. ✓ Ample headroom to add more RTs — the essence of deterministic scheduling.


Example 9 — Case I: exam twist — retries inflate worst-case latency

Forecast: People quote . What is the real worst case?

The trap: nominal timing assumes success. Worst case must include the failed attempts too.

  1. Cost of one failed attempt. A failed attempt still occupies the bus (command + partial/garbled response) then triggers a timeout. Model it as the full transaction time plus timeout: Why this step? The bus is not free during a failure — you still spent the transaction time before detecting the error.
  2. Worst case = 2 failures then 1 success. With 3 attempts max, the ugliest legal path is: fail, fail, succeed.
  3. (b) Why misleads. is the best case (first-try success). A real-time deadline analysis must budget the worst case, — over larger. Missing this is the #1 embedded-avionics latency bug.

Verify: ; ; . ✓ And , i.e. the naive number under-counts by more than a factor of three. ✓ For a frame this still fits (), but for a tight loop it would blow the budget — always schedule for retries.


Example 10 — Case J: passive diagnosis from a Bus Monitor trace

Forecast: Did the RT die? Or is this a normal "nothing to send" case?

This is why the BM exists: post-flight, it is often the only record of a fault, since it can eavesdrop without disturbing the deterministic schedule.

  1. The RT did respond. A status word appeared at , inside the window (Example 4). So the RT is alive and heard the command. Why this step? Rule out the "dead RT" hypothesis first — a status word is proof of life.
  2. But zero data words followed. For a transmit command with word count 4, the RT must send 4 data words back-to-back right after its status word (Example 1's recipe). The trace shows none. Why this step? A legal transmit reply is status + N data with no gap; missing data means the RT aborted mid-message.
  3. Diagnosis: the status word's Message-Error bit was set, or the RT hit an internal fault after acknowledging. Either way the RT signalled "I heard you but I have no valid data," and correctly sent no garbage. Why this step? 1553 forbids sending data words when the status word flags an error — silence is the correct protocol behaviour, not a second fault.
  4. Wasted bus time before the BC reacts. The BC allotted time for status + 4 data , but only the status () carried information. The BC detects the missing data and declares the message errored. Time consumed on this dead-end: before the BC can start a retry.

Verify: Status arrival so the RT is alive ✓. Expected reply would have been , so of data never came ✓. Time to the fault point ✓, matching the BM's own "status ends at 28 μs" timestamp. The monitor transmitted nothing throughout — it only listened.


Recall Self-test (reveal after you answer)

Word Count field reads 0 — how many data words? ::: 32 (the code 0 is reused for the maximum). One 1553 word takes how many microseconds on a 1 Mbit/s bus? ::: 20 μs (20 bits × 1 μs/bit). A common-mode noise spike of +50 V hits a logic-1 line (). What does the differential receiver read? ::: Still +10 V — common-mode noise cancels. Differential noise of +1V on A and −1V on B hits the same logic-1 line. What does the receiver read? ::: 12 V — differential noise does NOT cancel (this is the residual threat). Longest gap without an edge in Manchester II at 1 Mbit/s? ::: 0.5 μs (T/2), regardless of the data. Dual-bus comm-loss probability if each bus fails with p = 0.001? ::: p² = 10⁻⁶ (a 1000× improvement). Why is 208 μs the wrong number for worst-case nav-read latency? ::: It ignores retries; worst case (fail, fail, succeed) is 652 μs. A Bus Monitor sees a status word but no data words on a 4-word transmit — is the RT dead? ::: No — the status word proves it is alive; it correctly sent no data because its status flagged an error.

Recall Where this connects

Same differential trick, different goals ::: RS-485 Protocol, CAN Bus, ARINC 429. Why we lay messages on a fixed schedule ::: Time-Triggered Architectures, Real-Time Scheduling Theory. Why the encoding guarantees clock recovery ::: Manchester Encoding. The certification bar these reliability numbers must clear ::: DO-178C Certification.