5.5.28 · D3 · HinglishEmbedded Systems & Real-Time Software

Worked examplesMIL-STD-1553 — military avionics bus

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5.5.28 · D3 · Coding › Embedded Systems & Real-Time Software › MIL-STD-1553 — military avionics bus

Yeh page MIL-STD-1553 — military avionics bus ke liye "sleeves roll up karo" wali page hai. Har timing number, har fault case, har degenerate input jo standard throw kar sakta hai — sab kuch hum yahan work out karte hain, zero se. Agar koi symbol aata hai, pehle usse define karte hain.


The scenario matrix

Examples work karne se pehle, aao har ek tarah ki situation list karein jo yeh topic tumhare saamne rakh sakta hai. Isse ek checklist ki tarah socho: end tak, har row mein kam se kam ek fully-worked example hoga.

# Case class Tricky kyon hai Covered by
A Bus timing — normal message sync/data/gap sahi se add karo Ex 1
B Word-count boundary (0 encodes 32) "zero means max" wala trap Ex 2
C Bus utilisation / limiting value fraction, < 100% hona chahiye Ex 3
D Response-time window (min & max edge) RT bahut slow → error, RT bahut fast → yeh bhi illegal Ex 4
E Differential signalling with noise (common-mode AND differential) positive noise, negative noise, aur wo noise jo cancel nahi hoti Ex 5
F Manchester clock-drift limit (degenerate: all-0 / all-1) worst case string, edge phir bhi kyun aata hai Ex 6
G Redundancy probability (limiting: p→0, p→1) probabilities multiply karna, sanity bounds Ex 7
H Real-world word problem (schedule a whole minor frame) bahut saare messages, deadline Ex 8
I Exam twist (retry inflates worst-case latency) woh case jo log bhool jaate hain Ex 9
J Passive diagnosis from a Bus Monitor trace fault infer karo, kuch transmit mat karo Ex 10

Das rows, das examples. Aao woh do symbols define karte hain jo hum har jagah reuse karenge.


Example 1 — Case A: ek normal transmit transaction

Forecast: Abhi guess karo — kya answer , , ya ke zyada kareeb hai? Likh lo.

BC-reads-from-RT transaction ke pieces, order mein. Figure s01 ek timeline hai: horizontal axis microseconds mein time hai (0 se lagbhag 108 tak), aur har coloured rectangle bus activity ka ek block hai jo apni width ke barabar time occupy karta hai (koi vertical/value axis nahi hai — height sirf labelling ke liye hai). Left se right mein tumhe ek blue command block (20 μs wide), ek thin gray response gap (8 μs), ek orange status block (20 μs), phir teen green data blocks (20 μs each), aur ek red double-arrow dikhega jo poore cheez par span karta hai aur "Total = 108 us" likha hai. Steps padhte waqt blocks ko left se right follow karo.

Figure — MIL-STD-1553 — military avionics bus
  1. Command word (BC → RT): 1 word. Figure mein, yeh sabse left wala blue block hai. Yeh step kyun? BC ko pehle announce karna hota hai "RT #7, transmit 3 words." Bus par BC ke command ke bina kuch nahi hota. Yeh 1 word hai.
  2. Response gap: . Command ke baad wala thin gray block. Yeh step kyun? RT instant nahi hota. Standard usse wake up hone aur reply shuru karne ke liye ek response-time window (nominally 4–12 ) deta hai. "Window ka middle" .
  3. Status word (RT → BC): 1 word . Orange block. Yeh step kyun? RT ko data se pehle acknowledge karna hota hai aur health report karna hota hai. Yeh clean read par bhi mandatory hai.
  4. 3 data words (RT → BC), back-to-back, koi gaps nahi: . Teeno green blocks ke beech koi gap nahi. Yeh step kyun? Data words status word ke turant baad aate hain — yahan gaps deterministic bus time waste karte.

Total:

Verify: Wire par words count karo = 1 + 1 + 3 = 5 words , plus ek gap = . ✓ Units sab hain, aur (parent note ka 8-word example), jo samajh mein aata hai: kam data words → shorter. Forecast check: side ke zyada kareeb, toh "lagbhag sau" sahi ballpark tha.


Example 2 — Case B: word-count-zero trap

Forecast: Zero words? Ya kuch aur?

  1. Field literally padhna: yeh 0 kehta hai. Yeh step kyun? Hamesha raw bits se shuru karo.
  2. 1553 encoding rule apply karo. Word-count field 5 bits ka hai, toh yeh se tak values rakh sakta hai. Lekin ek message mein 1 se 32 words carry karne hote hain. Yeh 32 possibilities hain, aur 5 bits exactly 32 codes dete hain. Standard unhe is tarah map karta hai: values ka matlab hai "utne words," aur value ko 32 mean karne ke liye reuse kiya jaata hai. Yeh step kyun? Kyunki tum 33 meanings (0 se 32 tak) ko 32 codes mein fit nahi kar sakte — toh "0 real words" waise bhi meaningless hai (empty message kyun bhejna?), aur code ko useful maximum, 32, ke liye recycle kar diya jaata hai.
  3. Isliye Word Count = 0 ka matlab hai 32 data words.

Data-word time:

Verify: bits → codes, aur hume naam rakhne hain jo 32 items bhi hain. Ek perfect bijection, toh koi code waste nahi hota. ✓ . ✓


Example 3 — Case C: bus utilisation (ek limiting fraction)

Forecast: 1% se kam, kuch percent, ya 50% se zyada?

  1. Per second kitna bus time available hai? Yeh step kyun? "Utilisation" = time-used ÷ time-available. Ek second .
  2. Ek update ki cost kitni hai? Ek transaction .
  3. Per second kitne updates hote hain? .
  4. Per second time used:
  5. Utilisation:

Verify: Parent note claim karta hai 50 Hz sensor read ke liye "1.5% bus utilisation" — same ballpark; chhota sa fark isliye hai kyunki unhone exactly 208 ki jagah per read use kiya. Sanity bound: ko satisfy karna chahiye, aur comfortably andar hai. ✓ Units: = dimensionless. ✓


Example 4 — Case D: response-time window ki dono edges

Forecast: Sirf bahut slow wala problem hai, hai na? Padhne se pehle guess karo.

Hume dono boundaries check karni hain — isliye Case D matrix par hai.

  1. RT (a): par reply karta hai. Kyun check karein? , toh yeh bahut fast hai — minimum se pehle. BC ka receiver abhi shayad sun nahi raha; yeh ek timing violation hai. Illegal.
  2. RT (b): par reply karta hai. Kyun check karein? . Window ke andar. Legal.
  3. RT (c): par reply karta hai. Kyun check karein? , maximum se aage. BC ek no-response timeout declare karta hai aur message ko failed treat karta hai.

BC action on (a) and (c): message error mark ho jaata hai; BC retry karega (typically 3 attempts tak, Ex 9 dekho). Agar retries bhi fail ho jaayein, BC doosri bus par switch kar sakta hai.

Verify: Legal interval closed set hai. Membership: , , . ✓ Ek lower aur ek upper violation dono cover hain — window ke liye "every case" requirement yahi hai.


Example 5 — Case E: differential signalling, common-mode AND differential noise

Forecast: Kya bada common-mode spike bit ko destroy kar deta hai? Aur kya differential noise — jo har wire par alag hoti hai — kabhi reading ko threaten kar sakti hai?

Figure s02 ek voltage-versus-time plot hai: horizontal axis time hai (arbitrary units, 0 se 4) aur vertical axis voltage in volts hai (lagbhag se tak). Blue curve noisy wire A hai ( plus ek common-mode bump), orange curve noisy wire B hai ( plus wahi bump, toh yeh blue ke saath lockstep mein upar-neeche jaata hai), thick green curve unka difference hai jo flat par pinned hai, aur red dashed horizontal line threshold mark karti hai. Green line ka bilkul flat rehna jabki blue aur orange wobble karte hain yahi Part 1 ka poora point hai — dekho yeh bump ko ignore karta hai.

Figure — MIL-STD-1553 — military avionics bus

Part 1 — common-mode noise (noise cancel ho jaati hai).

  1. Receiver ki measurement likho. Dono wires par equal noise ke saath, aur : Yeh step kyun? Dono terms algebraically cancel ho jaate hain — answer ab par bilkul depend nahi karta. Yahi twisted pair ka exploited magic hai (dekho RS-485 Protocol).
  2. Har noise value plug karo: (i) . (ii) → phir bhi . (iii) → phir bhi . Yeh step kyun? Yeh dikhane ke liye ki positive, negative, aur enormous common-mode noise sab identical clean reading dete hain.
  3. Threshold se compare karo: , toh teeno logic 1 read karte hain. Koi bit flip nahi. Yahi figure mein green line hai, bump se unmoved.

Part 2 — differential noise (noise cancel nahi hoti).

  1. Unequal noise ke saath measurement likho. Ab aur : Yeh step kyun? Kyunki noise har wire par alag hai ( vs ), yeh subtraction ke baad survive karta hai — yeh woh ek noise type hai jo differential signalling reject nahi kar sakti.
  2. Interpret karo. Yahan differential noise ne humein threshold se aur door push kiya (), toh bit abhi bhi safe hai. Lekin agar isne difference se subtract kiya hota (), toh hum wall ki taraf creep kar rahe hote. Yeh step kyun? Yeh honest point banane ke liye: differential signalling sirf common-mode noise ke against ek shield hai. Pair ko tightly twist karna hi real-world noise ko common-mode rakhta hai (dono wires same interference dekhte hain).

Verify: Part 1 — har ke liye , sab ✓. Part 2 — , aur yeh noise par depend karta hai (yeh cancel nahi hua), confirm karta hai ki differential noise residual threat hai. ✓


Example 6 — Case F: Manchester worst-case drift (degenerate input)

Forecast: 100 identical bits ke saath, kya Manchester sach mein edges deta rehta hai?

Degenerate input (sab bits same) exactly wahan hai jahan naive encodings fail hoti hain — isliye yeh matrix par hai.

  1. Manchester rule yaad karo. Har bit period mein ek mid-bit transition hoti hai (logic 0 = HIGH→LOW centre par). Dekho Manchester Encoding. Yeh step kyun? Kyunki transition per bit guaranteed hai, "all zeros" ise suppress nahi kar sakta.
  2. Kisi bhi edge ke bina sabse lamba gap. length ke ek single bit ke andar, guaranteed edge centre par baiThi hai, har end se door. Isliye kisi bhi edge ke bina worst run: Yeh step kyun? 100 zeros bhi tumhe har mein ek edge dete hain — PLL (phase-locked loop, woh circuit jo clock re-sync karta hai) kabhi lock nahi khoega.
  3. NRZ comparison. NRZ mein, "0" sirf ek steady level hai. 100 zeros ke saath zero transitions. Yeh step kyun? Payoff concrete banane ke liye: vs edge density mein improvement hai.

Verify: chahe run kitna bhi lamba ho (100, 1000, ya ek million zeros). ✓ NRZ gap aur . ✓ Degenerate case handle hua: all-same-bit input worst case hai aur Manchester phir bhi pass karta hai.


Example 7 — Case G: dual redundancy, ki limiting values

Forecast: Improvement roughly , , ya hai?

  1. Independent failures multiply karte hain. Comm tab lost hoti hai jab dono buses fail ho jaayein: . Yeh step kyun? "Independent AND" probabilities multiply karta hai — ek core probability rule, aur do buses ka poora justification.
  2. (a) plug karo:
  3. (b) Limits.
    • : . Acha — perfect buses perfect availability deti hain.
    • : . Yeh bhi sahi hai — agar har bus hamesha fail ho, toh unke do bhi hamesha fail honge. Redundancy certain failure se nahi bacha sakti. Yeh step kyun? Limits check karna ek nonsense formula pakad leta hai: koi bhi valid probability mein rehni chahiye aur ends par sensibly behave karni chahiye. karta hai.
  4. (c) Improvement factor:

Verify: ✓. Bounds: for ✓. Improvement parent note se match karta hai. ✓ Yeh DO-178C Certification Level A availability meet karta hai; ek teesri bus sirf tak le jaati — added weight ke liye diminishing returns.


Example 8 — Case H: ek poora minor frame schedule karo (real-world)

Forecast: Comfortably fit hota hai, barely fit hota hai, ya overflow ho jaata hai?

  1. Engine read (transmit, 4 data words). Command + gap + status + 4 data: Yeh step kyun? Example 1 wala hi recipe hai, 3 ki jagah 4 data words ke saath.
  2. Weapons write (receive, 2 data words). Receive ke liye, BC command aur 2 data words bheji, phir RT gap ke baad status word reply karta hai: Yeh step kyun? Write par, data BC→RT command ke saath flow karta hai; status word last mein aata hai. Order read se alag hai, lekin word-count hi time drive karta hai.
  3. Frame sum karo:
  4. Fit check. Deadline . Kyunki , fit ho jaata hai, slack ke saath.
  5. Utilisation:

Verify: Wire par word counts: nav 10, radar 10, engine 6, weapons 4 → 30 words ; gaps: 4 ; total . ✓ , 100% se kaafi kam. ✓ Zyada RTs add karne ke liye ample headroom — deterministic scheduling ka essence.


Example 9 — Case I: exam twist — retries worst-case latency badhate hain

Forecast: Log quote karte hain. Real worst case kya hai?

Trap: nominal timing success assume karta hai. Worst case mein failed attempts bhi include hone chahiye.

  1. Ek failed attempt ki cost. Ek failed attempt phir bhi bus occupy karta hai (command + partial/garbled response) phir timeout trigger karta hai. Isse full transaction time plus timeout model karo: Yeh step kyun? Bus ek failure ke dauran free nahi hoti — error detect karne se pehle tumne transaction time spend kar diya.
  2. Worst case = 2 failures phir 1 success. 3 attempts max ke saath, sabse ugly legal path hai: fail, fail, succeed.
  3. (b) kyun mislead karta hai. best case hai (first-try success). Real-time deadline analysis mein worst case budget karna hoga, se zyada bada. Yeh miss karna #1 embedded-avionics latency bug hai.

Verify: ; ; . ✓ Aur , yaani naive number teen se zyada factor se undercount karta hai. ✓ frame ke liye yeh phir bhi fit ho jaata hai (), lekin tight loop ke liye budget blow ho jaata — hamesha retries ke liye schedule karo.


Example 10 — Case J: Bus Monitor trace se passive diagnosis

Forecast: Kya RT mar gaya? Ya yeh normal "kuch bhejne ko nahi" case hai?

Isliye BM exist karta hai: post-flight, yeh often ek fault ka maatra record hota hai, kyunki yeh deterministic schedule disturb kiye bina eavesdrop kar sakta hai.

  1. RT ne respond kiya. par status word aaya, window ke andar (Example 4). Toh RT zinda hai aur usne command suna. Yeh step kyun? "Dead RT" hypothesis pehle rule out karo — status word zindagi ka proof hai.
  2. Lekin koi data words follow nahi kiye. Word count 4 ke saath transmit command ke liye, RT ko apne status word ke turant baad 4 data words back-to-back bhejna hota hai (Example 1 ka recipe). Trace mein koi nahi dikhte. Yeh step kyun? Ek legal transmit reply hai status + N data bina gap ke; missing data ka matlab hai RT ne mid-message abort kiya.
  3. Diagnosis: status word ka Message-Error bit set tha, ya RT ne acknowledge karne ke baad internal fault hit kiya. Dono taraf RT ne signal kiya "maine suna lekin mere paas valid data nahi hai," aur correctly koi garbage nahi bheja. Yeh step kyun? 1553 forbid karta hai data words bhejna jab status word ek error flag kare — silence correct protocol behaviour hai, doosra fault nahi.
  4. BC react kare usse pehle wasted bus time. BC ne status + 4 data ke liye time allot kiya tha, lekin sirf status () ne information carry ki. BC missing data detect karta hai aur message errored declare karta hai. Is dead-end par consumed time: BC retry shuru karne se pehle.

Verify: Status arrival toh RT zinda hai ✓. Expected reply hoti, toh data kabhi nahi aaya ✓. Fault point tak time ✓, BM ke apne "status ends at 28 μs" timestamp se match karta hai. Monitor ne poore waqt kuch transmit nahi kiya — usne sirf suna.


Recall Self-test (answer karne ke baad reveal karo)

Word Count field 0 read karta hai — kitne data words? ::: 32 (code 0 maximum ke liye reuse hota hai). Ek 1553 word 1 Mbit/s bus par kitne microseconds leta hai? ::: 20 μs (20 bits × 1 μs/bit). Ek +50 V common-mode noise spike ek logic-1 line () par hit karta hai. Differential receiver kya read karta hai? ::: Phir bhi +10 V — common-mode noise cancel ho jaati hai. Wahi logic-1 line par A par +1V aur B par −1V ka differential noise hit karta hai. Receiver kya read karta hai? ::: 12 V — differential noise cancel nahi hoti (yeh residual threat hai). 1 Mbit/s par Manchester II mein kisi bhi edge ke bina sabse lamba gap? ::: 0.5 μs (T/2), data chahe kuch bhi ho. Dual-bus comm-loss probability agar har bus p = 0.001 se fail ho? ::: p² = 10⁻⁶ (1000× improvement). Worst-case nav-read latency ke liye 208 μs galat number kyun hai? ::: Yeh retries ignore karta hai; worst case (fail, fail, succeed) 652 μs hai. Bus Monitor ek 4-word transmit par status word dekha lekin koi data words nahi — kya RT dead hai? ::: Nahi — status word prove karta hai ki yeh zinda hai; usne correctly koi data nahi bheja kyunki uske status ne error flag kiya.

Recall Yeh kahan connect hota hai

Same differential trick, alag goals ::: RS-485 Protocol, CAN Bus, ARINC 429. Messages ko fixed schedule par kyun lagate hain ::: Time-Triggered Architectures, Real-Time Scheduling Theory. Encoding clock recovery kyun guarantee karta hai ::: Manchester Encoding. In reliability numbers ko jo certification bar clear karni hai ::: DO-178C Certification.