CAN bus — frame format, arbitration, error handling — critical in aerospace: Exercises

5.5.6 · D4 · Coding › Embedded Systems & Real-Time Software › CAN bus — frame format, arbitration, error handling — critic

Yeh page ek self-test ladder hai. Har problem ko solution kholne se pehle solve karo. Levels L1 Recognition (kya tumhe words pata hain?) se shuru hokar L5 Mastery (kya tum ek poora system design aur defend kar sakte ho?) tak jaati hain. Har solution poori tarah se explain kiya gaya hai taaki yeh page tab bhi sikhaye jab tum stuck ho jao.

Prerequisites jo tumhare paas parent note CAN bus topic se hone chahiye: dominant vs recessive bits, Wired-AND logic, arbitration, frame fields, aur error counters.

Un do words ka quick reminder jis par sab kuch tika hai:

Neeche wali single figure woh visual hai jo tum is page ke har arbitration exercise mein reuse karoge — yeh Exercise 2.1 draw out hai, aur Solution 2.1 seedha isi par refer karta hai:

Figure — CAN bus — frame format, arbitration, error handling — critical in aerospace

Abhi dekho: teen coloured traces — blue hai Node A ke bits, orange hai Node B ke bits, green hai shared bus (dono ka AND). Yeh bit by bit saath chalte hain jab tak red dashed line nahi aati, jahaan A dominant (0) drive karta hai aur B recessive (1) drive karta hai; green bus 0 par chala jaata hai, B mismatch dekhta hai aur drop out karta hai, aur A akele frame finish karta hai. L2 ke liye yeh picture mind mein rakho.

Level 1 — Recognition

Exercise 1.1

Ek CAN bus par, teen nodes simultaneously bits $1$ , $1$ , $0$ transmit karte hain. Bus par kaunsa single bit appear hoga, aur kya woh dominant hai ya recessive?

Recall Solution 1.1

WHAT we do: wired-AND rule bit by bit apply karo. Yahaan $\land$ logical AND operator hai (exercises ke bilkul upar define kiya gaya hai): yeh 1 tabhi deta hai jab har input 1 ho, aur 0 deta hai agar koi bhi input 0 ho. $bus = 1 \land 0 = 0, so 1 \land 1 \land 0 = 0.$ WHY: AND 0 return karta hai jaise hi koi bhi input 0 ho. Ek node ne dominant (0) drive kiya, toh usne sabke liye "wire ko pull down" kar diya. Answer: bus $0$ read karta hai, jo dominant state hai.

Exercise 1.2

Kaun sa CAN identifier zyada priority rakhta hai: $0x100$ ya $0x080$ ?

Recall Solution 1.2

WHAT: dono IDs ko plain numbers ki tarah compare karo. $0x100 = 256, 0x080 = 128.$ WHY: CAN mein, ==lower numeric ID = higher priority==, kyunki ek chota binary number apne dominant (0) bits pehle rakhta hai, aur dominant wired-AND jeet jaata hai. Answer: $0x080$ (128) ki higher priority hai kyunki $128 < 256$ .

Level 2 — Application

Exercise 2.1

Node A ID 0b10110010101 send karta hai aur Node B ID 0b10110100101 send karta hai. Dono saath shuru hote hain aur MSB→LSB transmit karte hain. Kis bit position par (MSB ko bit 10 aur bit 0 tak count karte hue) arbitration resolve hoti hai, aur kaunsa node jeet ta hai? (Yeh wahi scenario hai jo page ke upar wali figure mein draw kiya gaya hai.)

Recall Solution 2.1

WHAT: dono IDs ko align karo aur left-to-right scan karo pehle difference ke liye — exactly wahi jo upar ki figure blue (A), orange (B) aur green (bus) mein dikhati hai.

bit#	10	8	7	5	4	3	2	1	0
A	1	1	1	0	1	0	1	0	1
B	1	1	1	1	0	0	1	0	1
bus	1	1	1	0	…

WHY yeh bit: bits 10→6 identical hain, toh dono nodes exactly wahi read back karte hain jo unhone send kiya — tie, aage chalo. Bit 5 par A dominant (0) drive karta hai aur B recessive (1) drive karta hai. Wired-AND $0$ deta hai. B ne 1 bheja lekin 0 read kiya → mismatch → B haarta hai aur receiver ban jaata hai (yeh figure mein red dashed line hai). Decimal check: $0b10110010101 = 1429$ aur $0b10110100101 = 1445$ . Answer: arbitration bit 5 par resolve hoti hai; Node A jeet ta hai (uska ID $1429 <$ B ka $1445$ ). A ka frame kabhi interrupt nahi hota; B baad mein retransmit karta hai.

Exercise 2.2

Ek standard CAN data frame 3-byte payload carry karta hai. Bit stuffing ignore karte hue, SOF se EOF tak wire par kitne bits hain? Field table use karo: SOF 1, ID 11, RTR 1, IDE 1, r0 1, DLC 4, Data $8 \times n$ , CRC 15, CRC-delimiter 1, ACK 1, ACK-delimiter 1, EOF 7.

Recall Solution 2.2

WHAT: har fixed field ko add karo, plus data bits. $1 + 11 + 1 + 1 + 1 + 4 + (8 \times 3) + 15 + 1 + 1 + 1 + 7.$ WHY data term alag hai: Data ke alawa sab kuch fixed-size fields hain; sirf Data payload ke saath scale karta hai ( $n$ bytes ke liye $8 n$ bits). $= 44 + 24 = 68 bits .$ Answer: 68 bits (bit stuffing se pehle aur 3-bit inter-frame space se pehle).

Level 3 — Analysis

Exercise 3.1

Ek transmitter ka Transmit Error Counter TEC = 120 se Error-Active state mein shuru hota hai. Phir woh 2 consecutive transmit errors karta hai (beech mein koi success nahi). Inke baad, kya node Error-Active hai ya Error-Passive? Yaad karo: error par TEC += 8; Error-Passive jab $T E C > 127$ .

Recall Solution 3.1

WHAT: counter ko do baar step karo. $120 + 8 128 + 8 136.$ WHY +8: ek transmitter jo errors karta hai use 8 per error penalise kiya jaata hai (success par −1 se kaafi tez) taaki ek faulty talker khud ko jaldi silence kare — yahi fault confinement hai. Threshold check karo: pehli error ke baad hi $128 > 127$ , toh node Error-Passive hai. Doosri error ke baad woh TEC = 136 par hai, abhi bhi Error-Passive (Bus-Off abhi nahi, uske liye $T E C > 255$ chahiye). Answer: Error-Passive, TEC = 136.

Exercise 3.2

Ek node TEC = 128 (Error-Passive) par hai. Ab woh 12 frames successfully row mein transmit karta hai, har success mein $- 1$ milta hai. Uska final TEC kya hai, aur woh kis state mein hai?

Recall Solution 3.2

WHAT: 12 baar decrement karo. $128 - 12 = 116.$ WHY: har successful transmission 1 subtract karta hai, taaki ek recovered node dheere dheere wapas aa sake. Threshold check karo: $116 \leq 127$ , toh node wapas Error-Active hai. Answer: TEC = 116, Error-Active — yeh passive state se heal ho gaya.

Exercise 3.3

Do error events hote hain: ek transmitter aur ek receiver dono ek hi corrupted frame par ek ek error detect karte hain. Agar dono counter value 40 se shuru hote hain, toh unke naye counters kya hain (transmitter ke liye TEC, receiver ke liye REC)? Yaad karo: transmitter +8, receiver +1.

Recall Solution 3.3

WHAT: har node ka rule apply karo. $transmitter: 40 + 8 = 48 (T E C) .$ $receiver: 40 + 1 = 41 (R E C) .$ WHY asymmetry: jo node error cause kar raha hai (transmitter) woh zyada likely guilty party hai, toh woh us node se 8× tez climb karta hai jo sirf error witness karta hai. Isi tarah bus asli offender ko isolate karta hai. Answer: transmitter TEC = 48, receiver REC = 41.

Level 4 — Synthesis

Exercise 4.1

Tum ek aircraft CAN segment par IDs assign kar rahe ho (11-bit standard IDs, toh range $0$ se $2047$ ). Tumhare paas teen message types hain, most-urgent pehle: engine fire alarm, airspeed reading, cabin light status. Har ek ko ek valid ID assign karo taaki arbitration hamesha unhe sahi priority order mein serve kare, aur ordering rule justify karo.

Recall Solution 4.1

WHAT: urgent messages ko lowest numeric IDs milte hain.

Message	Suggested ID	Numeric
Engine fire alarm	`0x001`	1
Airspeed reading	`0x040`	64
Cabin light status	`0x7FF`	2047

WHY yeh kaam karta hai: arbitration ke dauran teeno apne IDs bit by bit transmit karte. Fire alarm ke ID mein sabse zyada leading dominant (0) bits hain, toh agar woh kabhi compete kare toh woh dominant drive karta hai jabki baaki mismatch read karke back off kar jaate hain. Ordering check: $1 < 64 < 2047$ ✅ urgency se match karta hai. Answer: koi bhi assignment jisme $ID(fire) < ID(airspeed) < ID(cabin)$ ho correct hai; jaise 0x001, 0x040, 0x7FF.

Exercise 4.2

Ek designer ACK-error alarm chahta hai. Step by step explain karo ki exactly kis sequence mein ek transmitter conclude karta hai "kisi ne mujhe suna nahi," ACK-slot mechanism use karke. Phir batao ki kya error counter change hota hai.

Recall Solution 4.2

WHAT / step sequence:

Transmitter ACK slot ko recessive (1) bhejta hai — woh deliberately wire ko "floating high" chhod deta hai.
Koi bhi receiver jisne CRC check pass kiya woh slot ko dominant (0) se overwrite karta hai.
Transmitter ACK slot wapas read karta hai. Dominant (0) → kam se kam ek node ne suna. Recessive (1) → kisi ne acknowledge nahi kiya.

WHY yeh collective hai: koi per-node acknowledgment nahi hai; kisi bhi receiver ki taraf se ek single dominant thumbs-up kaafi hai. Agar transmitter bus par akela node hai, ya sabhi receivers CRC fail karte hain, toh slot recessive rehta hai → ACK error.

Counter change: ACK error transmit-side failure hai, toh TEC += 8 aur frame automatically retransmit ho jaata hai. Answer: transmitter ACK slot mein recessive read karta hai ⇒ ACK error ⇒ TEC += 8, retransmit.

Level 5 — Mastery

Exercise 5.1

Ek faulty transmitter baar baar fail karta hai. Woh TEC = 231, Error-Passive se shuru hota hai. Har failed transmission +8 deta hai; assume karo koi success nahi. Kitne consecutive failures use Bus-Off mein push kar denge (defined as $T E C > 255$ )? TEC woh value do jis par woh Bus-Off go karta hai.

Recall Solution 5.1

WHAT: +8 steps ki smallest number dhundo jo 231 ko 255 se aage le jaaye. $231 + 8 k > 255 ⟹ 8 k > 24 ⟹ k > 3.$ Toh smallest integer $k = 4$ hai. $231 + 8 239 + 8 247 + 8 255 + 8 263.$ WHY $k = 4$ naa ki 3: 3 failures ke baad TEC = 255, jo $> 255$ nahi hai (abhi bhi Error-Passive, barely). 4th failure 263 tak pahunchti hai, pehli value jo strictly 255 se above hai. Answer: 4 consecutive failures; TEC = 263 Bus-Off entry par.

Exercise 5.2 (design + defend)

Ek DO-178C-certified aircraft par ek CAN segment do subsystems share karte hain: ek flight-critical sensor (10 ms period) aur ek maintenance logger (large frames ke bursts). CAN mechanisms use karke explain karo ki logger sensor ko ek in-progress frame se zyada kyun kabhi delay nahi kar sakta — aur worst-case blocking time compute karo agar bus 1 Mbit/s par run kare aur largest logger frame (stuffing ke saath) zyada se zyada 160 bits ho.

Recall Solution 5.2

WHAT — priority argument:

Sensor ko low ID do (high priority) aur logger ko high ID do (low priority).
CAN arbitration non-destructive bitwise arbitration hai: jab bhi dono ready hote hain, sensor pehle differing bit par jeet ta hai — logger dominant read kar ke haarta hai aur defer karta hai. Toh logger ek queued sensor message ko kabhi preempt nahi kar sakta.

WHAT — bacha hua delay (priority inversion window):

Ek cheez jo sensor ko delay kar sakti hai woh hai ek logger frame jo already in progress hai jab sensor ready hota hai. CAN ek frame ko mid-transmission interrupt nahi kar sakta, toh sensor ko woh single frame wait out karna hoga. Yahi worst-case blocking time hai.

Compute karo: 1 Mbit/s par har bit $1 μ s$ leta hai. $t_{block} = 160 bits \times 1 μ s / bit = 160 μ s = 0.16 ms .$ WHY yeh safe hai: $0.16$ ms sensor ke 10 ms period ke against tiny hai, toh sensor har cycle mein apna deadline meet karta rehta hai (ise Real-Time scheduling worst-case-response analysis se connect karo). Answer: logger sensor ko zyada se zyada ek in-progress frame = 160 μs delay kar sakta hai; kabhi zyada nahi, kyunki arbitration non-destructive hai aur sensor hamesha fresh contention jeet ta hai.

[!recall]- Poore ladder ka one-line recap

L1: dominant = 0 AND jeet ta hai; lower ID = higher priority.

L2: arbitration pehle differing bit par resolve hoti hai; ek 3-byte frame = 68 bits.

L3: transmitter +8 / success −1 graded confinement deta hai (Active → Passive → Bus-Off).

L4: urgent = low ID assign karo; ACK ek single shared dominant thumbs-up hai.

L5: Bus-Off ke liye TEC > 255 chahiye; worst-case blocking = ek in-progress frame time.