Intuition What this page does
The parent note gave you three techniques — Polling, Interrupt-driven, DMA — and their cost formulas. Now we exercise every corner case so you never meet a scenario you can't reason about. We start with a matrix of every case-class this topic can produce, then solve worked examples until every cell of that matrix is covered.
Everything below reuses only symbols the parent already earned:
T d e v = time the slow device takes to become ready.
t p o l l = cost (in CPU time) of one poll of the status register.
t in t = cost of taking + servicing one interrupt (save context, run ISR , restore context).
N = number of bytes (or words) in a transfer.
If any of those feels shaky, the parent note builds them from zero first.
Every I/O costing question is one (or a mix) of these case classes . Think of it like the quadrants of a coordinate plane: we must cover them ALL, including the degenerate edges.
Cell
Case class
Distinguishing input
Which method should win?
A
Slow device, single unit
T d e v huge, N = 1
Interrupt
B
Fast device, almost-always-ready
T d e v ≈ t p o l l
Polling
C
High-rate stream, per-byte interrupt
N huge, one IRQ/byte
Polling beats interrupt (!)
D
Large block transfer
N huge, block-capable
DMA
E
Crossover / break-even
solve for the tie point
depends — find threshold
F
Degenerate: N = 0
nothing to transfer
all cost ≈ setup only
G
Limiting: T d e v → 0
device instant
Polling (no wait to overlap)
H
Limiting: T d e v → ∞
device never ready
Polling waste → ∞
I
Cycle-stealing correction
DMA + bus contention
DMA, but CPU not 100% free
J
Real-world word problem
pick the method
reasoning, not just arithmetic
K
Exam twist
mixed/misleading numbers
catch the trap
We now cover A–K with examples. Each example is tagged with the cell(s) it hits.
Worked example Example 1 — Cell A: slow device, one byte
A disk sensor produces one status byte. The device needs T d e v = 10 , 000 CPU-time-units to be ready. One poll costs t p o l l = 1 unit. One interrupt costs t in t = 200 units. Which is cheaper, polling or interrupt?
Forecast: guess before reading — a 10,000-unit wait vs a 200-unit interrupt. Which wins?
Polling cost. Wasted polls ≈ t p o l l T d e v = 1 10000 = 10000 units, all pure waste, then 1 transfer.
Why this step? The parent's polling-cost formula: the CPU spins back-to-back until the last poll finds it ready.
Interrupt cost. CPU issues the command, does other work, pays t in t = 200 once.
Why this step? Overhead is paid once per unit , and here there is exactly one unit.
Compare. 10000 ≫ 200 .
Verify: ratio 10000/200 = 50 × cheaper with interrupts. A slow, rare device → interrupts. ✅
Worked example Example 2 — Cell B & Cell G: fast, almost-always-ready device
A status flag is ready almost immediately: T d e v = 1 unit (essentially the next poll succeeds). t p o l l = 1 , t in t = 200 . Poll or interrupt?
Forecast: the device is basically instant. Does the fancy interrupt machinery still help?
Polling cost. Wasted polls ≈ T d e v / t p o l l = 1/1 = 1 . So ≈ 1 wasted poll + 1 transfer ≈ 2 units.
Why this step? When T d e v → t p o l l , the loop runs about once — no meaningful waste. This is the T d e v → 0 limit (Cell G).
Interrupt cost. Still t in t = 200 units of fixed overhead every time.
Why this step? Interrupt overhead does not shrink with a fast device — save/restore context is a fixed price.
Compare. 2 ≪ 200 .
Verify: polling is 100 × cheaper. Confirms the parent's claim: for a device that is almost always ready, polling can be the fastest option. ✅
Worked example Example 3 — Cell H: the never-ready limit
Same numbers, but a broken device: T d e v → ∞ (it never becomes ready). What happens under polling vs interrupts?
Forecast: which method hangs the CPU and which lets it survive?
Polling. Wasted polls ≈ T d e v / t p o l l → ∞ . The CPU spins forever in the busy-wait loop — the machine is frozen.
Why this step? Polling gives up the CPU to nothing but checking ; with no timeout it never exits.
Interrupt. The CPU issued the command and left . It keeps doing useful work; the interrupt simply never arrives. The CPU is not frozen.
Why this step? Interrupt-driven I/O overlaps device idle time with real work, so a stuck device costs the CPU nothing (until a software timeout fires).
Verify: limiting behaviour: polling waste → ∞ , interrupt CPU cost stays bounded. This is why real polling loops need timeouts. ✅
Worked example Example 4 — Cell C: high-rate stream, per-byte interrupts (the surprise)
A fast network card delivers N = 1 , 000 , 000 bytes, one byte ready every T d e v = 5 units. Per-byte interrupt costs t in t = 200 units; one poll costs t p o l l = 1 . Compare total CPU cost for polling vs interrupt (no DMA yet).
Forecast: interrupts are supposed to be the "smart" upgrade over polling. For a firehose device, is that still true?
Polling cost per byte. Wait ≈ T d e v / t p o l l = 5/1 = 5 polls + 1 move ≈ 6 units/byte.
Total ≈ 6 × 1 0 6 = 6 , 000 , 000 units.
Why this step? Device is fast so each busy-wait is tiny; total = per-byte cost × N .
Interrupt cost per byte. One IRQ per byte = t in t = 200 units/byte.
Total = 200 × 1 0 6 = 200 , 000 , 000 units.
Why this step? The parent's catch — one interrupt per byte at high rate makes ISR overhead dominate.
Compare. 6 × 1 0 6 vs 2 × 1 0 8 : polling is ≈ 33 × cheaper .
Verify: for a high-rate device, polling beats interrupt-driven — exactly the paradox the parent warned about, and precisely why DMA was invented. ✅
Worked example Example 5 — Cell D: large block, bring in DMA
Same 1,000,000-byte transfer as Example 4, now with a DMA controller . DMA setup = 200 units, one final IRQ = 200 units. Compare all three methods' CPU cost.
Forecast: DMA count is independent of N . By how many orders of magnitude should it win?
Polling (from Ex. 4): ≈ 6 , 000 , 000 units.
Interrupt (from Ex. 4): ≈ 200 , 000 , 000 units.
DMA. CPU cost = setup + final IRQ = 200 + 200 = 400 units, independent of N .
Why this step? The controller moves each byte autonomously; CPU involvement is O ( 1 ) not O ( N ) .
Verify: DMA (400 ) vs polling (6 × 1 0 6 ) vs interrupt (2 × 1 0 8 ). DMA is ∼ 1 0 4 –1 0 6 times cheaper. ✅ See the figure below.
Worked example Example 6 — Cell E: find the break-even between polling and interrupts
A device becomes ready in T d e v units; t p o l l = 1 , t in t = 200 . For a single-byte transfer, at what T d e v do polling and interrupt cost the same ?
Forecast: the tie is where "wasted spinning" first equals "interrupt overhead". Guess the number.
Set costs equal. Polling waste ≈ T d e v / t p o l l = T d e v . Interrupt cost = t in t = 200 .
Break-even: T d e v = t in t .
Why this step? The parent's rule "interrupts win when T d e v ≫ t in t " — the boundary is literally equality.
Solve. T d e v = 200 units.
Why this step? Below this the device is "fast enough" that spinning is cheaper; above it, interrupts win.
Verify: at T d e v = 200 , polling waste = 200 = t in t . For T d e v < 200 → poll; T d e v > 200 → interrupt. ✅ This gives you a decision threshold , not just an answer. See figure.
Worked example Example 7 — Cell F: the degenerate zero-byte transfer
A driver issues a "transfer" but the count is N = 0 bytes (empty read). Cost under each method? t p o l l = 1 , t in t = 200 , DMA setup = 200 .
Forecast: with nothing to move, is the cost truly zero?
Polling. N = 0 moves. It may still poll once to confirm "ready/no data" ≈ 1 unit.
Why this step? You can't move zero bytes for free — the status still gets checked at least once.
Interrupt. N ⋅ t in t = 0 × 200 = 0 transfer interrupts, but a completion IRQ may still fire ≈ 200 units depending on the device.
Why this step? Per-byte work vanishes; only fixed protocol overhead can remain.
DMA. Setup 200 + final IRQ 200 = 400 units even though nothing moved.
Why this step? DMA's cost is O ( 1 ) by design — it does not drop to zero at N = 0 ; the setup is the same.
Verify: degenerate case shows the ordering flips at the low end — for N = 0 , polling is cheapest (1 unit) and DMA is most expensive (400), the exact opposite of the large-N ordering. ✅
Worked example Example 8 — Cell I: the cycle-stealing correction
A DMA transfer moves N = 1000 words. Each word DMA grabs the memory bus for 1 cycle, stalling the CPU for that cycle (cycle stealing). The CPU runs at 1 cycle/unit. How much CPU time is lost to contention, and is the CPU "100% free"?
Forecast: the parent's mistake callout says DMA does not make the CPU fully free. Estimate the loss.
Stall cost. DMA steals 1 cycle per word × 1000 words = 1000 stolen cycles = 1000 units.
Why this step? Cycle stealing = DMA and CPU share one bus; each stolen cycle is a CPU stall.
Compare to interrupt-driven cost. Interrupt would have cost 1000 × t in t = 1000 × 200 = 200 , 000 units of active CPU work.
Why this step? Even with cycle stealing, DMA's stolen 1000 units ≪ 200,000.
Interpretation. CPU is not 100% free (it lost 1000 units), but it lost 200 × less than the interrupt method.
Why this step? Corrects the "DMA = totally idle CPU" misconception while keeping DMA the clear winner.
Verify: stolen = 1000 units > 0 (so not 100% free), yet 1000 ≪ 200000 (so still far better). ✅
Worked example Example 9 — Cell J: real-world word problem (choose the method)
A driver author must pick a technique for three devices:
(a) a keyboard — one keystroke every ~200 ms, 1 byte each;
(b) a 10 Gbps NIC — millions of packets/sec, large frames;
(c) a temperature sensor polled by a tight control loop that reads a fresh value that is always ready within one poll .
Choose polling / interrupt / DMA for each and justify.
Forecast: map each device onto a matrix cell before choosing.
Keyboard → interrupt-driven (Cell A). Rare events, one byte each. Polling wastes 200 ms of spinning; DMA is overkill for a single byte.
Why this step? Match method to rate (rare) and block size (tiny). T d e v huge ⇒ interrupts beat polling.
NIC → DMA (Cell D). Huge N , block-capable. Per-byte interrupts would drown the CPU (Cell C); DMA gives 1 IRQ per frame.
Why this step? High-rate + large block is the textbook DMA case.
Sensor → polling (Cell B/G). Always ready in one poll, T d e v ≈ t p o l l ; interrupt overhead t in t would exceed the tiny poll cost.
Why this step? When the device is essentially instant, spinning once is cheaper than t in t .
Verify: each choice matches its matrix cell and the cost inequalities from Examples 1–5. ✅
Worked example Example 10 — Cell K: the exam twist (spot the trap)
"A student claims: since DMA needs 200 units of setup and polling needs only 1 unit per poll, polling is always cheaper. " Refute with numbers for an N = 100 , 000 -byte transfer where each byte's device-wait is T d e v = 5 units, t p o l l = 1 .
Forecast: the trap is comparing a per-unit number to a whole-transfer number. Find the flaw.
Real polling total. Per byte ≈ T d e v / t p o l l + 1 = 5 + 1 = 6 units. Total = 6 × 100000 = 600 , 000 units.
Why this step? Polling's "1 unit" is per poll , and there are many polls per byte times many bytes — it scales as O ( N ) .
DMA total. 200 setup + 200 final IRQ = 400 units, independent of N .
Why this step? DMA is O ( 1 ) ; its one-time 200 is a fixed cost, not per-byte.
Expose the fallacy. 600000 ≫ 400 . The student compared DMA's total to polling's per-poll cost.
Why this step? Always compare total CPU cost for the whole transfer , never per-unit vs whole.
Verify: polling 600 , 000 vs DMA 400 → DMA wins by 1500 × . The "polling always cheaper" claim is false for large N . ✅
Recall Which method wins in each limit?
T d e v → 0 (instant device) → wins? ::: Polling — nothing to overlap, interrupt overhead is wasted.
T d e v → ∞ (never ready) → polling does what? ::: Spins forever, waste → ∞ ; interrupts leave CPU free.
High byte-rate, one IRQ/byte → polling vs interrupt? ::: Polling can beat interrupt because t in t per byte dominates.
Large block transfer → best method? ::: DMA — interrupt count drops from N to 1 .
N = 0 degenerate transfer → cheapest method? ::: Polling (≈ 1 unit); DMA still pays its O ( 1 ) setup.
Break-even T d e v between poll and interrupt (single byte)? ::: T d e v = t in t .
Does DMA make the CPU 100% free? ::: No — cycle stealing steals bus cycles, but the loss is tiny vs interrupts.
Related: Context switching (paid on every interrupt), CPU utilization and throughput (what all this optimises), Disk Scheduling (orders the DMA transfers), Memory-mapped I/O vs Port-mapped I/O (how registers are addressed).