Write policies — write-through, write-back, write-allocate: Visual walkthrough

Step 1 — Two boxes and the copy problem

WHAT. Draw the whole machine as just two boxes: a small fast box (the cache, made of SRAM) sitting next to a big slow box (main memory, made of DRAM). The cache holds copies of some memory data.

WHY. Before we can count costs, we must agree on what "a write" physically touches. A write can land in the fast box, the slow box, or both. Every policy is just a different choice of which boxes get touched and when.

PICTURE. In the figure, the fast box is the small teal square; the slow box is the wide orange bar. The double-headed arrow is the slow road between them — this is the expensive part. Notice the two boxes can disagree: the cache says 7, memory still says 3. That disagreement is the entire reason write policies exist.

Step 2 — Splitting every write into HIT or MISS

WHAT. When the CPU writes to an address, exactly one of two things is true: the block is already in the fast box (a hit) or it is not (a miss). There is no third case.

WHY. A cost is an average, and to average we must split the world into cases whose probabilities add to 1. Hit and miss are those cases. We name their fractions:

$h = fraction of writes that HIT, m = 1 - h = fraction that MISS$

$h$ — how often the data is already close (the fast, cheap path).
$m = 1 - h$ — the leftover; "everything that isn't a hit is a miss," so the two must sum to $1$ .

PICTURE. A bar of length $1$ split into a big teal chunk $h$ and a small plum sliver $m$ . Every write is a dart landing somewhere on this bar. Good locality = a very wide teal chunk.

Step 3 — Write-through: pay the slow box every single time

WHAT. In write-through a write touches both boxes, always. Fast box + slow box, hit or miss, no exceptions.

WHY. The design goal here is simplicity and always-current memory: memory must never be behind, so we never let a write sit only in the cache. The price is that the slow road gets used on every write.

PICTURE. Every dart — whether it lands in the teal (hit) or plum (miss) region — fires an arrow down the slow road. The cost of one write is therefore fixed:

$T_{w t} = write the fast box t_{c} + write the slow box, every time t_{m}$

$t_{c}$ — we always update the cache copy so a later read is fast.
$t_{m}$ — because memory must stay current, this term is not multiplied by any small fraction. It is paid unconditionally.

Step 4 — The dirty bit: a memo that defers the slow write

WHAT. Write-back updates only the fast box on a write, and flips one extra bit on that line: the dirty bit. dirty = 1 means "this copy has changed; memory is now stale."

WHY. We want to skip the slow road on repeated writes to the same spot. But if we skip it, we must remember that we owe memory an update later. The dirty bit is that one-bit memo.

PICTURE. Each cache line gets a tiny flag. A clean line (dirty=0, teal flag) can be thrown away for free — its copy matches memory. A dirty line (dirty=1, orange flag) carries a debt: before it can leave the cache, it must pay the slow box once.

Step 5 — When does write-back actually touch the slow box?

WHAT. Follow one hot address written many times, then evicted. The slow road is used exactly once — at eviction, and only if the victim line was dirty.

WHY. This is the whole payoff. Many fast writes collapse into a single slow write. We need to know how often an eviction is dirty, so we name that fraction:

$d = fraction of evicted (replaced) blocks that are dirty$

$d$ — if a block leaves clean ( $1 - d$ of the time), eviction is free; if it leaves dirty ( $d$ of the time), we owe one $t_{m}$ .

PICTURE. A timeline: five write-arrows all land in the fast box (cheap), the dirty flag stays up, and only at the far right — the eviction moment — does a single arrow travel the slow road. Compare to write-through's five slow arrows from Step 3.

Step 6 — Assembling the write-back cost

WHAT. Add up what one average write costs under write-back, walking the two cases from Step 2.

WHY. We average over the hit/miss split, charging the slow box only where it truly occurs.

A hit (fraction $h$ ): the block is already here → just touch the fast box → cost $t_{c}$ . No slow road.
A miss (fraction $m$ ): we must (a) fetch the wanted block from memory, cost $t_{m}$ , and (b) if the line we kicked out was dirty, write it back, cost $t_{m}$ but only $d$ of the time → $d t_{m}$ .

Putting the always-paid $t_{c}$ out front and charging the slow terms only on the $m$ slice:

$T_{w b} = t_{c} + m (fetch the new block t_{m} + write back dirty victim d t_{m}) = t_{c} + m t_{m} (1 + d)$

$t_{c}$ — every write touches the fast box, so this is unconditional (like write-through).
$m$ — the discount. The slow terms only happen on misses; multiply them by the miss fraction.
$t_{m}$ (first) — the fetch-on-write-miss cost (this is write-allocate doing its job).
$d t_{m}$ — the deferred debt from Step 4/5, paid only when the evicted victim is dirty.

Step 7 — Plug in numbers and see the gap

WHAT. Use the parent's figures: $t_{c} = 1$ , $t_{m} = 50$ , $h = 0.95$ so $m = 0.05$ , $d = 0.3$ .

WHY. A formula only convinces once you feel the size of the win.

$T_{w t} = 1 + 50 = 51 cycles$

$T_{w b} = 1 + m 0.05 \times t_{m} 50 \times 1 + d (1 + 0.3) = 1 + 0.05 \times 65 = 1 + 3.25 = 4.25 cycles$

$\frac{T _{w t}}{T _{w b}} = \frac{51}{4.25} = 12 \Rightarrow write-back is 12 \times cheaper here.$

PICTURE. Two bars: a tall orange one at $51$ (write-through) and a short teal stub at $4.25$ (write-back), with the ratio annotated. That height difference is why L1/L2 caches choose write-back.

Step 8 — The degenerate cases (never leave a scenario unshown)

WHAT. Push the formula to its extremes and check it still makes sense.

WHY. A formula you trust is one you have stress-tested at every corner.

Extreme	What happens to $T_{w b} = t_{c} + m t_{m} (1 + d)$	Meaning
$m = 0$ (never miss)	$T_{w b} = t_{c}$	Perfect locality: never touches slow box. Best case.
$m = 1$ (never hit), $d = 0$	$T_{w b} = t_{c} + t_{m}$	Every write misses, victims all clean → equals write-through ( $t_{c} + t_{m}$ ).
$m = 1$ , $d = 1$	$T_{w b} = t_{c} + 2 t_{m}$	Worst case: every write misses and every victim is dirty → two slow trips, so write-back is now worse than write-through.
$d = 0$ always	$T_{w b} = t_{c} + m t_{m}$	Read-heavy / rarely-dirtied data: eviction write-backs vanish.

PICTURE. The write-back cost drawn as a line rising with $m$ , for two values of $d$ . At $m = 0$ both lines start at $t_{c}$ ; the flat orange write-through line $t_{m}$ sits above until the lines cross. The crossover is where write-back stops winning — exactly the "streaming write" regime from the parent's Example 3.

The one-picture summary

The final figure compresses all eight steps: the two boxes, the hit/miss bar, both cost formulas with their slow terms circled, and the crossover plot showing when each policy wins.

Recall Feynman retelling — say it in plain words

We have a fast box next to a slow box, and the slow box costs $t_{m}$ per touch while the fast one costs $t_{c}$ . Every write is either a hit (data already in the fast box) or a miss, splitting the world by fractions $h$ and $m = 1 - h$ . Write-through insists memory is never behind, so it touches the slow box on every write — its cost $t_{c} + t_{m}$ has a naked slow term. Write-back cheats: it writes only the fast box and raises a dirty flag as a memo. Repeated writes to the same spot cost only $t_{c}$ ; the slow box is touched just once, at eviction, and only if the victim was dirty (fraction $d$ ). Averaging, that gives $t_{c} + m t_{m} (1 + d)$ — the slow term is now discounted by the miss rate. With good locality ( $m$ small) that discount is enormous, so write-back wins ~ $12 \times$ . But push $m \to 1$ and $d \to 1$ (streaming dirty writes) and the discount vanishes; write-back can even lose. So the policy isn't universally best — it's a bet on locality, and the formula tells you exactly when the bet pays off.

Recall Check yourself

Why does $T_{w t}$ have no $m$ in it? ::: Because write-through touches memory on every write regardless of hit or miss, so the slow term is unconditional. In $T_{w b} = t_{c} + m t_{m} (1 + d)$ , what does the $(1 + d)$ count? ::: One $t_{m}$ to fetch the missing block, plus $d \times t_{m}$ to write back the victim only when it's dirty. At what workload do write-back and write-through cost the same? ::: When every write misses and every victim is clean ( $m = 1, d = 0$ ): both give $t_{c} + t_{m}$ . With $t_{c} = 1, t_{m} = 50, m = 0.05, d = 0.3$ , what is $T_{w b}$ ? ::: $1 + 0.05 \times 50 \times 1.3 = 4.25$ cycles.

Related: Cache Memory Fundamentals · Cache Replacement Policies · Write Buffers and Store Buffers · Memory Hierarchy and AMAT · Cache Coherence — MESI · DMA and I/O Consistency