Question bank — Approximate computing techniques

False. Error is engineered and bounded — we choose exactly where it goes (LSBs, non-critical data) and prove a quality guarantee; it is a design knob, not a defect.

False. An $n\times n$ array multiplier lays out $\approx n^2$ full-adder cells (a square grid — see figure s03), so energy $\propto n^2$; halving $n$ gives $(1/2{)}^2=1/4$ — a 4× cut, not 2×. See Ripple-Carry vs Array Multipliers.

False. Dynamic power $\propto V^2$, so $1-0.8^2=0.36$ → about a 36% saving. The square (figure s01) is exactly why voltage overscaling is a jackpot. See Dynamic Power P = alpha C V^2 f.

True. Total error grows as $\sqrt{N}\sigma$ while the sum grows as $N\mu$, so the ratio $\sim \sigma /(\mu \sqrt{N})\to 0$ (histogram in figure s04 shows the error pile-up staying narrow).

False. It cancels only if errors are independent and zero-mean; a biased scheme (e.g. always truncating downward) drifts systematically and grows as $N$, not $\sqrt{N}$ (the two lines diverge in figure s04).

False. Precision scaling shrinks the circuit (fewer switching cells, the $n$ or $n^2$ factor in $C$); overscaling shrinks the $V^2$ term while keeping the same circuit. Different levers on $P=\alpha C{V}^{2}f$.

False. It works for the opposite reason — adjacent rows/pixels are highly correlated, so a skipped row is well-approximated by its neighbour.

False. The $n^2$ multiplier shrinkage is the biggest single factor (figure s05), but INT8 also moves 4× fewer bytes → less memory-bandwidth and data-movement energy; a naive kernel that still shuffles FP32-sized data can lose much of the win. Both arithmetic and data movement matter. See Neural Network Quantization.

True. Fewer refreshes save power but let some cells decay and flip; if the data is error-tolerant (e.g. pixel values), those flips are acceptable. See DRAM Refresh and Memory Reliability.

True. Truncation always drops the tail (rounds toward zero), so the error has a consistent sign — this bias is why rounding schemes are often preferred for aggregation (see the drifting line in figure s04).

The error is approximating control flow / addresses — corrupting loop bounds or pointers causes crashes or wild output; only tolerant data may be approximated.

The exponent controls magnitude; a single wrong exponent bit can multiply a value by a power of two → catastrophic error. Only mantissa LSBs are safe. See Precision and Number Formats (FP32, FP16, INT8).

Opposite goals — Error-Correcting Codes spend extra bits/energy to remove error, approximate memory permits error to save energy. You use one where reliability matters, the other where it doesn't.

The $\sqrt{N}$ law assumes independent errors on a sum. In a feedback loop errors can be amplified step-to-step; you must check stability, not just per-op error.

Delay grows as $V$ falls ($t_d\propto V/(V-V_{th}{)}^{\beta }$, the steep curve in figure s01); at a fixed clock some paths miss their deadline → timing errors. It only "works" because those errors are steered onto non-critical LSBs.

Reversed — PSNR is a quality metric on a log scale, higher is better. 41 dB is the cleaner image; the $+8$ dB gap means several-fold less error (figure s02).

Not guaranteed — per-op error and end-to-end quality are different quantities; errors may accumulate, cancel, or be amplified depending on the algorithm. You must measure the application metric (PSNR, accuracy).

An $n$-bit ripple adder is a line of $n$ full-adders → energy $\propto n$. An $n\times n$ array multiplier is a square grid of $\approx n^2$ full-adders (figure s03) → energy $\propto n^2$. Because the grid grows in two directions at once, shrinking $n$ removes area quadratically — that quadratic is the lever. See Ripple-Carry vs Array Multipliers.

(1) Any input could be the worst case. (2) A system you ship must promise quality on all of them. (3) So you need a proven ceiling on error, not an average — an unbounded scheme can silently fail on some rare input even if it's usually fine.

(1) Rounding errors are roughly zero-mean, so summing $N$ of them lets $+$ and $-$ cancel → total grows only as $\sqrt{N}$. (2) Truncation always leans one way (bias), so its errors add up → total grows as $N$. (3) For large $N$ the biased line towers over the unbiased one (figure s04) — same per-op size, wildly different totals.

(1) Reward: power falls as $V^2$, so a small voltage cut gives an outsized power cut (left curve, figure s01). (2) Risk: delay $t_d\propto V/(V-V_{th}{)}^{\beta }$ blows up as $V\to V_{th}$ (right curve). (3) The two race: gains only outrun risks while the induced timing errors land on cheap-to-tolerate LSBs.

(1) You can't power all transistors at once within the thermal/power budget. (2) Approximation cuts energy per useful result. (3) So the same power budget buys more useful compute — approximation directly buys back "dark" area. See Dark Silicon and Energy-Efficient Architectures.

(1) Each output is a sum over many weighted inputs — an aggregation, so per-multiply noise partly cancels ($\sqrt{N}$ law). (2) The final answer is a discrete decision ("cat"), robust to small wobbles in the score. (3) Result: tiny multiply errors rarely flip the class. See Neural Network Quantization.

(1) Bit-width $n$ only fixes how many bits. (2) The circuit design decides how those bits behave — exact vs approximate full-adder, where the array is truncated, how much the voltage is overscaled. (3) Same $n$, different engineering ⇒ different error.

With $N=1$ there is nothing to cancel against — the $\sqrt{N}$ shrinkage vanishes and relative error is the full $\sigma /\mu$. A lone approximate op must be tolerated on its own, not by statistics.

They stop cancelling; the variance of the sum gains positive cross-terms and can grow like $N^2$ rather than $N$, so the standard deviation grows like $N$ — the $\sqrt{N}$ benefit is gone entirely (this is the biased curve's cousin in figure s04).

A degenerate, dangerous case — a corrupted index/branch is not "slightly wrong output" but an out-of-bounds access, crash, or arbitrary jump. Such data is strictly off-limits, no matter how much energy it would save.

The longest (critical) timing path fails first — it has the least slack, and figure s01's delay curve rises fastest there. As $V$ drops further, errors creep from the LSBs upward toward the MSBs until the quality bound breaks and output becomes garbage.

It skips every iteration — a degenerate case doing no real work; the output is pure copy/interpolation of the initial state. The speed-vs-quality trade-off has collapsed and quality is unbounded (useless).

Essentially nothing — every bit is critical (a single flipped ledger cent or cipher bit is a hard failure), so there is no safe place to inject error. The technique simply does not apply.