Tensor cores and matrix operations: Foundations — Hardware deep dive

Before you can read the parent note, you must own every symbol it throws at you. We build them here in order, each one leaning on the one before. Nothing is assumed.

1. A number is just a value — but how many bits?

The parent note keeps saying FP16, FP32, INT8, TF32. These are formats — recipes for storing one number using a fixed number of on/off switches (bits).

Figure — Tensor cores and matrix operations

Look at the figure. Each bar is one number's "budget" of bits, split into three jobs:

The sign bit (slate, always exactly 1 bit) decides positive or negative: $0$ means $+$ , $1$ means $-$ . This is how every floating-point format stores a negative value — one dedicated switch at the very front.
Exponent bits (lavender) decide how big or small the number can get — the range.
Mantissa bits (mint) decide how many decimal places of detail — the precision.

Before the table, meet two of its entries properly:

Format	Layout (sign · exp · mantissa)	Total bits	What it buys
FP32	1 · 8 · 23	32	full range + full detail (the safe default)
FP16	1 · 5 · 10	16	half the memory, small range
BF16	1 · 8 · 7	16	FP32's range, coarse detail
TF32	1 · 8 · 10 (internal, 19)	19	FP32 range, FP16-ish detail
INT8	1 sign · 7 value (two's-complement)	8	whole numbers $- 128 \dots 127$ , 4× smaller than FP32

Keep this in your pocket — it powers the whole "Precision Modes" section of the parent, and links to 8.3.4-Mixed-precision-training and 8.4.2-Quantization-techniques.

2. A matrix is a grid of numbers

The parent writes A, B, C, D and calls them "4×4 tiles" or "1024×1024 matrices". A matrix is simply a rectangle of numbers arranged in rows and columns.

In the figure, follow the red pointer to $A [1] [2]$ — row $1$ (second row down), column $2$ (third column across). One symbol, one cell. Once this clicks, C[i][j] in the parent is no longer scary — it is just "one cell of the output grid."

3. Matrix multiplication: the dot product in disguise

This is the heart of everything. The parent's central formula is

$C [i] [j] = \sum_{k = 0}^{K - 1} A [i] [k] \cdot B [k] [j]$

We must earn every symbol in it.

3a. The multiply-add (this is what a core does)

3b. The summation symbol $\sum$

Worked tiny example: $\sum_{k = 0}^{2} k^{2} = 0^{2} + 1^{2} + 2^{2} = 0 + 1 + 4 = 5$ . That is all $\sum$ ever does.

3c. Now the whole formula, in pictures

Read the formula out loud now: " $C [i] [j]$ equals the sum, as $k$ goes from $0$ to $K - 1$ , of $A$ -in-row- $i$ -column- $k$ times $B$ -in-row- $k$ -column- $j$ ." Every symbol is now a thing you can point at in the picture.

4. From one cell to a whole tile: `D = A×B + C`

The parent's Tensor Core operation is $D = A \times B + C$ where all four are small grids.

4a. When the sizes don't divide evenly

The tiled loops in the parent step forward $4$ (or $16$ ) at a time. But what if $K = 1000$ , which is not a multiple of $4$ ? The last chunk would run off the edge of the matrix.

5. Where the work lives: SM, warp, thread

The parent says a warp of 32 threads cooperates, split into groups. Two hardware words to define.

Numbers must also travel from slow memory to these engines — that path is the 6.2.8-Memory-hierarchy-in-GPUs, and it is why FP16's smaller size (section 1) matters for speed.

6. Counting speed: FLOP, FLOPS, throughput

This is the vocabulary of the parent's performance math and of the 9.1.5-Roofline-model. Quick self-check on the parent's own numbers: $102 4^{3} \approx 1.07 \times 1 0^{9}$ FMAs, and $(1024/4)^{3} = 25 6^{3} \approx 1.68 \times 1 0^{7}$ tile-ops, giving the ratio $4^{3} = 64$ . Every piece of that is now a symbol you own.

Prerequisite map

Everything above flows into the parent topic 6.2.12 Tensor cores and matrix operations (Hinglish) and its companions 7.3.6-cuBLAS-and-cuDNN and 8.3.4-Mixed-precision-training.

Equipment checklist

Cover the right side and test yourself. If any answer surprises you, re-read its section.

What is a bit, and what do the sign, exponent, and mantissa bits each control?

A bit is one on/off switch; the sign bit sets positive/negative, exponent bits set the range, mantissa bits set the precision.

How does a floating-point format store a negative number?

With a dedicated sign bit at the front —

0

means

+

1

means

-

What is BF16's layout and why is it good for training?

1 sign + 8 exponent + 7 mantissa; it copies FP32's exponent so it reaches the same wide range, trading detail for range — ideal for gradients.

What range does INT8 cover and how are negatives stored?

- 128

+ 127

, using 1 sign bit + 7 value bits in two's-complement.

What does the shape

M \times N

mean for a matrix?

M

rows going down,

N

columns going across.

What number does

A [1] [2]

refer to (0-indexed)?

The entry in the second row, third column.

What is the difference between row-major and column-major storage?

Row-major lays out row 0 then row 1 (entry at

i \cdot cols + j

); column-major lays out column 0 then column 1 (entry at

j \cdot rows + i

In words, what does

\sum_{k = 0}^{K - 1}

tell you to do?

Let

k

step through

0

K - 1

, compute the term for each, and add them.

What is an FMA, and how many FLOPs is it?

A fused multiply-add,

a \cdot b + c

; it counts as 2 FLOPs.

Write the formula for one output cell

C [i] [j]

C [i] [j] = \sum_{k = 0}^{K - 1} A [i] [k] \cdot B [k] [j]

Why must the inner dimension

K

A

and

B

match?

It is the length of the row and column you slide along together; unmatched lengths cannot be paired.

D = A \times B + C

, what job does

C

do?

It is the accumulator — it holds the running total so partial products can be added on.

Which properties actually make tiling correct?

Associativity of addition and distributivity of scalar multiplication over the

k

-sum — not matrix-multiply associativity, and matrix multiply is not commutative.

What is a partial tile and how is it handled?

An edge tile only partly filled with real data; you pad the missing cells with

0

(which contribute nothing) and ignore the extra output rows/columns.

Why do dimensions that are multiples of 8 or 16 run fastest?

They avoid partial tiles, so no hardware cycles are wasted on padded arithmetic.

What is the difference between FLOP and FLOPS?

FLOP is one operation (a job); FLOPS is operations per second (a rate).

Why do smaller formats like FP16 make Tensor Cores faster?

Fewer bits means more numbers fit on the chip and move through memory faster, while a wide FP32 accumulator preserves accuracy.

Recall Quick fire — the summation drill

Compute $\sum_{k = 0}^{2} k^{2}$ . ::: $0 + 1 + 4 = 5$ . For $2 \times 2$ matrices, how many FMAs to compute $C = A \times B$ ? ::: $2 \times 2 \times 2 = 8$ .