5.4.17 · D4Memory Hierarchy & Caches

Exercises — Prefetching strategies

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Figure — Prefetching strategies

Level 1 — Recognition

Recall Solution 1.1

Accuracy is over issued prefetches: . Coverage is over original misses: . Different denominators — that is the whole point. Both land in as they must. Accuracy ::: 0.30 Coverage ::: 0.48

Recall Solution 1.2

(a) Next-line — consecutive elements, stride of one line's worth; the +1 rule catches it. (Stride also works, next-line is the cheapest that suffices.) (b) Stride — a constant gap larger than one element; next-line would miss every element in between. (c) Correlation — the next address is whatever the pointer holds; no arithmetic pattern exists, so only recorded miss-pairs (A→B) help. Relates to Spatial vs Temporal Locality. (a) ::: next-line (b) ::: stride (c) ::: correlation


Level 2 — Application

Recall Solution 2.1

Every access pays ; only the miss fraction pays the penalty. AMAT_base ::: 6.8 cycles

Recall Solution 2.2

Step 1 — effective miss rate. Why subtract ? Imagine 100 misses lined up as 100 tickets. Coverage means the prefetcher physically tore up 65 of those tickets before the CPU reached them — those 65 accesses now hit in cache. Only the surviving tickets () still cost a miss. That is literally the green-slice-removed picture in the figure at the top: the miss bar drops from to . There is no accuracy factor here — coverage already counts only tickets actually torn up. Step 2 — new AMAT. Same formula, smaller miss fraction: Step 3 — speedup. . m_eff ::: 0.014 AMAT_pf ::: 3.68 cycles speedup ::: about 1.85x

Recall Solution 2.3

Confirmed stride (and , — all agree). The address-line diagram below traces exactly this: violet dots are the observed accesses, orange squares are the three prefetches issued after . Prefetch for from the latest address :

Farthest distance ahead bytes. prefetched ::: 2192, 2240, 2288 farthest distance ::: 144 bytes

Figure — Prefetching strategies

Level 3 — Analysis

Recall Solution 3.1

Use the figure's two-slice picture: the green slice removed is , but the magenta pollution slice added is — pollution out-stacks the benefit, so we expect a loss even before computing. Baseline: cycles. It hurts by cycles per access. Low accuracy shrank coverage and the useless prefetches evicted live lines (see Cache Pollution and Replacement Policies). m_eff ::: 0.073 AMAT_pf ::: 8.3 cycles AMAT_base ::: 7.0 cycles net change ::: +1.3 cycles (worse)

Recall Solution 3.2

Break-even is the moment the magenta slice exactly equals the green slice — the miss bar returns to its original height. Formally : Any pollution above makes it a net loss. In Ex 3.1, — which is exactly why it hurt. Note always, consistent with the stated domain. break-even pollution ::: 0.012

Recall Solution 3.3

Coverage is the product of "issued for" and "succeeded": . Both and live in , so their product does too — no domain violation. coverage ::: 0.45 m_eff ::: 0.0275 AMAT ::: 3.75 cycles


Level 4 — Synthesis

Recall Solution 4.1

Time to fully hide cycles. Each line "consumes" cycles of compute. So the prefetch must lead by: Running fewer than 15 lines ahead means the prefetch is late (partial miss). Running far more risks evicting live data too early. This lead is why degree/distance tuning matters — connects to Memory-Level Parallelism (MLP) and Out-of-Order Execution. distance ahead ::: 15 lines

Recall Solution 4.2

Before blocking, the access pattern jumped across rows — irregular, so a hardware stride prefetcher could not lock a stride, and a software hint (or correlation prefetcher) was needed. After blocking, the inner loop walks contiguous elements = unit stride. A plain hardware next-line / stride prefetcher detects this automatically at zero instruction cost. Therefore the explicit PREFETCHT0 becomes redundant: it would only spend instruction bandwidth for a pattern the hardware already covers. Key insight: improving locality (blocking) can make expensive software prefetching unnecessary — restructure data before adding prefetch instructions. sufficient mechanism ::: hardware next-line / stride prefetch


Level 5 — Mastery

Recall Solution 5.1

Write AMAT as a function of (recall ): With : coefficient of is . So decreases as grows — more coverage always helps here because the pollution penalty ( per unit coverage) is smaller than the benefit ( per unit coverage). This is the figure's rule: green slice removed per unit () exceeds magenta slice added per unit (). Thus the optimum is the largest achievable , i.e. (the top of coverage's domain): Interpretation: whenever pollution-per-coverage , push coverage to its ceiling ; if it exceeded , the coefficient flips positive and the best choice is (turn the prefetcher off). The break-even slope is exactly . coefficient of c ::: -0.03 optimal coverage ::: 1 AMAT_min ::: 8.5 cycles

Recall Solution 5.2

Coverage (issued × success): . (Note: accuracy is a bandwidth metric — it does NOT enter coverage.) Pollution from unused prefetches: (positive, and , so within domain). Effective miss rate: . AMAT: cycles. Baseline: cycles. Net win of cycles per access — because the green slice () removed outweighs the magenta pollution slice () added. coverage ::: 0.35 pollution ::: 0.008 m_eff ::: 0.0405 AMAT ::: 5.05 cycles net gain ::: 0.95 cycles


Recall Self-check summary

Formula for effective miss rate ::: m_eff = m(1-c) + delta_m Formula for AMAT ::: t_hit + m_eff * t_miss Coverage denominator ::: original misses Accuracy denominator ::: prefetches issued Break-even pollution ::: delta_m = m * c Coverage domain ::: 0 <= c <= 1 Pollution domain ::: delta_m >= 0 (typically <= m) Timely prefetch distance ::: ceil(t_miss / cycles_per_line) lines

See also the parent: Prefetching strategies and the Hinglish companion 5.4.17 Prefetching strategies (Hinglish).