Foundations — Cache coherence problem
Before you can even read the parent note, you must own a small pile of ideas. Below, each one is built from zero: plain meaning → the picture → why the topic needs it. They are ordered so each rests on the one before.
1. Main memory — the single shared source
Picture it as one long shelf of numbered boxes. Everyone points at the same shelf.
Why the topic needs it: coherence is about copies of one box. If there were no single shared shelf to copy from, there'd be nothing to disagree about.
2. Address X — the label on one box
Picture it: a sticky label reading X on one specific box; inside sits the number 5.
Why the topic needs it: the entire coherence problem is defined per address. Two caches disagreeing about X is the whole bug. X is the thing everyone keeps a copy of.
3. Core — a worker that reads and writes
Picture it: two people standing at the shared shelf, each free to peek or scribble.
Why the topic needs it: with a single core there is only one copy of everything and no disagreement is possible. Coherence problems are born the instant you have two or more cores.
4. Cache — the private photocopy

Picture it (figure above): each core holds its own little notebook. The red box shows the shared shelf; the black notebooks are the private copies. Notice both notebooks can hold a copy of the same box X.
Why the topic needs it: "private" is the whole villain. If caches were shared, everyone would read the same copy and always agree. Because each is private, a change in one is invisible to the others.
5. Cache line — the unit that gets copied
Picture it: instead of photocopying one word, you photocopy a whole page. X lives somewhere on that page.
Why the topic needs it: the parent talks about invalidating "the line," and later topics like False Sharing only make sense once you know a copy is a chunk, not a single box.
6. Read and Write — the two actions
Picture it: read = your eyes copying a number into your notebook. Write = your pen scribbling a new number.
Why the topic needs it: coherence bugs appear specifically when a write by one core is not seen by a later read on another. The whole problem is a write/read mismatch.
7. Stale data — a copy that no longer matches truth
Picture it: your notebook says 5, but the real current answer is 10. Your 5 is stale.
Why the topic needs it: "stale" is the one-word name for the failure. Coherence exists to prevent reads from returning stale copies.
8. Valid — is my copy trustworthy?
Picture it: a small tick ✓ on your notebook page meaning "you may trust this," or a cross ✗ meaning "don't trust — go re-copy from the shelf."
Why the topic needs it: the parent's mini-derivation is written entirely in terms of . It is also the switch a protocol flips: to fix staleness you set .
9. Notation cache_i(X) and the symbols , ,
The parent writes its invariant in shorthand. Here is every symbol, in words.
Why the topic needs it: the coherence invariant now reads in plain English: "For every pair of cores, if both hold a trusted copy of X, those copies must be equal." No symbol here is un-earned.
10. Write-back vs write-through — where a write lands

Picture it (figure): write-through sends an arrow straight to the shelf on every write; write-back keeps the change trapped in the notebook (marked dirty, red) until later.
Why the topic needs it: the parent's steel-man argument ("doesn't write-through fix it?") turns on this exact distinction. Write-through keeps memory fresh but never touches another core's cache — so coherence still breaks. Detail lives in Write-through vs Write-back.
11. The bus — the shared wire cores talk over

Picture it (figure): a single red horizontal wire; all notebooks and the shelf hang off it. When Core A shouts "invalidate X!", every other core hears it.
Why the topic needs it: every coherence cure is a message. "Invalidate" and "update" are things a core says on the bus so others can react. Because everyone hears everything, this is called snooping — see Snooping vs Directory Coherence. Counting these messages is exactly Bus Traffic & Scalability.
12. Invalidate vs Update — the two cures
Picture it: invalidate = "cross out your number." Update = "everyone change your number to 10."
Why the topic needs it: these are the two protocol families the whole parent note builds toward, and the seed of the MESI Protocol.
The prerequisite map
Equipment checklist
Self-test: can you answer each without peeking?
What does "main memory" provide that makes disagreement possible?
What does the label X refer to in this topic?
Why does having two or more cores create the problem?
What is a cache line?
Define "stale."
What does mean?
Read aloud: .
Difference between write-back and write-through?
What is the bus and why does snooping work on it?
Name the two cures after a write and what each does.
Connections
- Parent: Cache coherence problem
- Write-through vs Write-back
- MESI Protocol
- Snooping vs Directory Coherence
- False Sharing
- Bus Traffic & Scalability
- Memory Consistency Models