5.4.12 · D1Memory Hierarchy & Caches

Foundations — TLB (translation lookaside buffer)

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This page assumes nothing and is fully self-contained. By the end you should be able to point at every symbol below and say what it means and what it looks like. We build them one at a time, each using only the ones before it, then hand you off to the main TLB (translation lookaside buffer) note.


1. A "byte" and an "address" — the alphabet of memory

Why this matters: everything a TLB does is turning one box-number into a different box-number. If you don't picture memory as numbered boxes, none of the translation talk lands.


2. Bits and — how many boxes can a number name?

We will use in a moment to count the bits inside one page — but first we must define what a page is.


3. Splitting an address: the page part and the offset part

Why this matters: a TLB translates only the page number and leaves the offset alone. Without the mental picture of "cut the address in two", the idea "offset is not translated" is meaningless.


4. Virtual vs physical — two different mailbox streets

This mapping VPN → PFN is stored in the Page Table, and the whole scheme is Virtual Memory.


5. The page table — the big map (and why it's slow)

The catch: because the map itself lives in DRAM, reading it costs a memory access. So a naive translation is "read the map (1 access), then read your data (1 access)" — at least twice the work. Modern maps are split into several levels, so a full page-table walk can be 4 memory reads before you even touch your data. This slowness is the entire reason a TLB is worth building.

If a page's valid bit is off, touching it triggers a Page Fault — the OS must fetch it from disk. That is a different, much slower event than a mere translation miss.


6. Shift, OR, and the frame's base address

Worked check: PFN 0x0037 with KiB, so .

  • in decimal.
  • 0x37000. This is the frame's base byte address, with the low 12 bits all zero (an empty offset-slot).
  • Now OR in the offset 0xABC: since 0x37000 has zeros in its low 12 bits and 0xABC fits in exactly 12 bits, . The offset slots cleanly into the hole.

7. Locality, caches, and how we measure the payoff

Because of Locality of Reference, a notepad holding just the last-used handful of VPN → PFN mappings will satisfy the vast majority of translations. That notepad is a cache, and this specific one is the TLB. (The general caching idea is Cache (memory hierarchy).)


8. Context switch — why the notepad can go stale

So after a Context Switch, the notepad's remembered translations may belong to the wrong program — stale entries. You only need to know why it happens: two programs reuse the same VPNs for different frames.


Prerequisite map

byte and address

bits and log2

split address into page and offset

memory as numbered boxes

virtual VA VPN

physical PA PFN frame

page table map

shift and OR equal place bits

locality of reference

cache hit miss and EMAT

TLB

context switch

Read it bottom-up: everything funnels into K = TLB. If any upstream box is fuzzy, the arrows into K break.


Equipment checklist

Test yourself — cover the right side and answer aloud.

A byte is how many bits, and how many values can it hold?
8 bits, 256 possible values.
An address is, in plain words, what?
The number painted on a mailbox — how you name one storage location.
Why do memory sizes come in powers of two?
Addresses are made of bits; bits name locations.
and what does it count?
12; the number of bits needed to name 4096 things, since .
Why must the page size be a power of two?
So an address splits into page-number and offset by a clean bit-cut, making a whole number of offset bits.
What does the symbol mean?
Concatenation — glue two bit-groups side by side into one number (not multiply).
What does bitwise OR () do here?
Sets a bit to 1 if either input has it; used to drop the offset into the empty low bits of the frame's base address.
When you split an address, which part is translated?
Only the page-number part; the offset passes through unchanged.
VPN vs PFN in one line each?
VPN = which pretend (virtual) page; PFN = which real (physical) frame.
Why does shifting left by multiply by ?
Each left slide of the bits doubles the value; doing it times multiplies by .
Where does the page table physically live, and why is that a problem?
In DRAM; reading it costs a full memory access, so translation would double every access.
What is locality of reference?
Programs touch the same few pages repeatedly, so caching translations pays off.
What does EMAT stand for and measure?
Effective Memory Access Time — the average time per access mixing fast hits with slow misses.
Cache hit vs miss?
Hit = answer already stored (fast); miss = not stored, pay slow path once, then remember it.
Why can the TLB hold wrong data after a context switch?
Different programs reuse the same VPNs for different frames, so old entries become stale.