Average memory access time (AMAT): Worked examples

The scenario matrix

Every AMAT problem is one (or a blend) of these cells. Each worked example below is tagged with the cell it lands on.

Cell	What makes it special	Example
A. Baseline single-level	plain $H T + m \cdot M P$ , ordinary numbers	Ex 1
B. Degenerate $m = 0$	perfect cache, never misses	Ex 2
C. Degenerate $m = 1$	every access misses (limiting worst case)	Ex 2
D. Unit mismatch	all terms of the formula must share ONE unit before you combine — mixing cycles and ns is the classic trap	Ex 3
E. Two-level nesting (local rates)	penalty of L1 = AMAT of L2	Ex 4
F. Global-vs-local trap	given global rate, must convert	Ex 5
G. Solve backwards	AMAT known, find the unknown $m$ or $M P$	Ex 6
H. Real-world word problem	translate a story into the formula	Ex 7
I. Exam twist — design tradeoff	bigger cache lowers $m$ but raises $H T$ ; which wins?	Ex 8

We'll walk them in order. Every numeric answer here is machine-checked in the verify block.

The picture that runs the whole page

Figure 1 — Anatomy of AMAT.

Figure — Average memory access time (AMAT)

Look at the split in Figure 1: every access pays the flat green "hit" bar on the left. Only the fraction $m$ of accesses continues into the long coral "penalty" bar. AMAT is the green bar plus the coral bar scaled down by $m$ . Keep this image in mind — every example is just choosing numbers for those two bars.

The worked examples

Worked example Ex 3 — Cell D: unit mismatch (cycles vs ns)

A cache hits in 1 clock cycle. Miss rate $= 5%$ . A miss costs 100 cycles. The CPU clock period is $0.5$ ns. Find AMAT in nanoseconds.

Forecast: Do you multiply by the clock period before or after combining? Does it matter?

Check the units first: $H T$ and $M P$ are both in cycles, so they already share one unit — safe to combine. (If one were in ns and one in cycles, you'd have to convert before adding.) Why this step? The AMAT formula only makes sense when $H T$ and $M P$ carry the same unit; adding a cycle count to a nanosecond count would be nonsense.
Compute AMAT in cycles: $AMAT = 1 + 0.05 \times 100 = 6$ cycles. Why this step? All inputs are cycles, so the formula's output is cycles.
Convert to ns: $6 cycles \times 0.5 \frac{ns}{cycle} = 3$ ns. Why this step? One cycle lasts $0.5$ ns, so multiply the cycle count by the period. Beginners forget this or convert only one term.

Verify: Because the conversion is a single multiply, converting first then combining gives the same: $(1 \times 0.5) + 0.05 \times (100 \times 0.5) = 0.5 + 2.5 = 3$ ns. Same answer → order didn't matter. ✅ Units: cycles × (ns/cycle) = ns. ✅

Worked example Ex 4 — Cell E: two-level cache, local rates

$H T_{L 1} = 1$ ns, $m_{L 1} = 8%$ ; $H T_{L 2} = 8$ ns, $m_{L 2} = 25%$ (local); DRAM penalty $M P_{L 2} = 150$ ns. Find AMAT.

The pattern (kept here so you needn't leave this page): a multi-level AMAT is just the single-level formula nested. The "miss penalty of L1" is not a fixed DRAM number — it is itself an AMAT: $H T_{L 2} + m_{L 2} \cdot M P_{L 2}$ . So you compute the inner (L2) subsystem's AMAT first, then feed it in as L1's penalty: $AMAT = H T_{L 1} + m_{L 1} (L1’s real miss penalty H T_{L 2} + m_{L 2} \cdot M P_{L 2}) .$

Forecast: The L1 miss penalty is not 150 ns — it's whatever an L1 miss really costs. Guess: bigger or smaller than 150?

Inner subsystem (what an L1 miss actually costs) $= H T_{L 2} + m_{L 2} \cdot M P_{L 2} = 8 + 0.25 \times 150 = 8 + 37.5 = 45.5$ ns. Why this step? An L1 miss drops into L2: it always pays L2's hit time, and only the $25%$ that also miss L2 pay the DRAM trip. That's an AMAT in its own right — it becomes L1's effective penalty.
Plug into L1: $AMAT = H T_{L 1} + m_{L 1} \times 45.5 = 1 + 0.08 \times 45.5 = 1 + 3.64 = 4.64$ ns. Why this step? Now L1's formula uses its real penalty $45.5$ ns, not the raw DRAM $150$ ns.

Verify: The scary $150$ ns DRAM cost only reaches the CPU on the global fraction $m_{L 1} \times m_{L 2} = 0.08 \times 0.25 = 0.02$ , contributing $0.02 \times 150 = 3$ ns. Add L2's own hit cost $0.08 \times 8 = 0.64$ and the flat $1$ : $1 + 0.64 + 3 = 4.64$ ns. ✅ Same answer two ways.

Worked example Ex 5 — Cell F: global-vs-local trap

You're told: overall (global) L2 miss rate is $2%$ , and $m_{L 1} = 8%$ . What is L2's local miss rate, and does the recursive AMAT formula want local or global here?

Forecast: Is the local rate bigger or smaller than the global $2%$ ?

Recall the link: global $= m_{L 1} \times m_{L 2, local}$ . Why this step? L2 only sees accesses L1 forwarded (the L1 misses). Global counts against all CPU accesses, a bigger denominator, so global is smaller.
Solve for local: $m_{L 2, local} = \frac{global}{m _{L 1}} = \frac{0.02}{0.08} = 0.25 = 25%$ . Why this step? Divide the global rate by the fraction that even reached L2.
The recursive AMAT term $H T_{L 2} + m_{L 2} \cdot M P_{L 2}$ uses the local $25%$ . Why this step? Inside that term we're standing at L2, and L2 only measures against the traffic it actually receives.

Verify: Convert back: $m_{L 1} \times m_{L 2, local} = 0.08 \times 0.25 = 0.02 = 2%$ global. ✅ Notice these are exactly the numbers from Ex 4 — the local $25%$ is what plugged into that nested term.

Worked example Ex 7 — Cell H: real-world word problem

A web server serves requests. $92%$ of the time the answer is already in an in-memory cache (hit), taking $0.3$ ms. The other $8%$ require a disk read (miss) that adds $12$ ms on top of the cache check. What is the average response time?

Forecast: Will the average be near $0.3$ ms or near $12$ ms? (Think: how heavy is that $8%$ ?)

Map the story to AMAT: $H T = 0.3$ ms (always paid — every request checks the cache), $m = 0.08$ , $M P = 12$ ms (extra, "on top of"). Why this step? The phrase "adds ... on top of" confirms $M P$ is the extra cost, not the total — matching the standard definition.
Apply: $AMAT = 0.3 + 0.08 \times 12 = 0.3 + 0.96 = 1.26$ ms. Why this step? Same formula; only the story's words changed.

Verify: The miss contribution $0.96$ ms is over three times the hit cost $0.3$ ms even though misses are only $8%$ — the rare-but-expensive misses dominate the average, the whole moral of AMAT. Bounds check: $1.26$ lies in $[0.3, 12.3]$ ms. ✅

Worked example Ex 8 — Cell I: exam twist, the design tradeoff

You may keep the current cache ( $H T_{A} = 1$ ns, $m_{A} = 10%$ ) or switch to a bigger, slower cache ( $H T_{B} = 2$ ns, $m_{B} = 4%$ ). Both share $M P = 100$ ns. Which gives the lower AMAT? (See Cache Associativity & Hit Time tradeoff.)

Forecast: Doubling hit time but more than halving miss rate — intuition says B wins... but check!

Cache A: $AMAT_{A} = 1 + 0.10 \times 100 = 1 + 10 = 11$ ns. Why this step? Baseline to beat.
Cache B: $AMAT_{B} = 2 + 0.04 \times 100 = 2 + 4 = 6$ ns. Why this step? Higher hit time ( $+ 1$ ns), but far fewer expensive misses ( $- 6$ ns of penalty).
Compare: $6 < 11$ , so Cache B wins by $5$ ns. Why this step? The saved penalty ( $6$ ns) beats the extra hit cost ( $1$ ns).

Verify: Net change $= (H T_{B} - H T_{A}) + (m_{B} - m_{A}) M P = (+ 1) + (- 0.06) (100) = 1 - 6 = - 5$ ns. ✅ Matches $6 - 11 = - 5$ . The lesson: a bigger cache is worth it only when the penalty it saves outweighs the hit time it adds — always plug in, never eyeball.

Figure 2 — Ex 8 tradeoff bars.

Figure 2 makes Ex 8 visible: Cache B's green (hit) bar is taller, but its coral (penalty) bar shrinks far more — the total stack is shorter.

Recall

Recall Cover and answer

When $m = 0$ , AMAT equals what? ::: Exactly the hit time $H T$ (the lower end of the band). When $m = 1$ , AMAT equals what? ::: $H T + M P$ — the worst case, every access pays both (the upper end). AMAT is always bounded between which two values? ::: $[H T, H T + M P]$ . Given global L2 miss rate and $m_{L 1}$ , how to get local L2 rate? ::: Divide: $m_{L 2, local} = global / m_{L 1}$ . In Ex 8, why did the bigger, slower cache still win? ::: The penalty it saved ( $6$ ns) exceeded the extra hit time it cost ( $1$ ns).

Connections

Average memory access time (AMAT) (parent)
Cache Miss Rate & Miss Types (3 Cs)
Miss Penalty & Main Memory Latency
Multi-level Cache Hierarchy
Cache Associativity & Hit Time tradeoff
CPU Performance Equation
Locality of Reference