5.4.10 · D5 · HinglishMemory Hierarchy & Caches
Question bank — Average memory access time (AMAT)
5.4.10 · D5· Hardware › Memory Hierarchy & Caches › Average memory access time (AMAT)
True or false — justify
Hit time ko standard AMAT formula mein hit rate se multiply kiya jaata hai.
False. Expected value se shuru karo; dono branches mein appear karta hai, isliye yeh ke roop mein factor out ho jaata hai. Hit time unconditional hai; sirf par ka factor hota hai.
Lower miss rate hamesha AMAT ko lower karti hai, baaki sab equal ho.
True. AMAT ko ka function maano; iska slope ek positive constant hai, isliye AMAT strictly mein increasing hai aur mein koi bhi decrease AMAT ko strictly decrease karti hai.
Agar miss rate 0 hai, toh AMAT hit time ke barabar hai.
True. substitute karne par milta hai; koi miss nahi hone par penalty term identically zero hai, isliye har access exactly ek cache access jitna lagta hai.
Agar miss rate 100% hai, toh AMAT miss penalty ke barabar hai.
False. substitute karne par milta hai, sirf nahi — kyunki hamari convention mein extra cost hai, ek guaranteed miss bhi pehle hit access pay karta hai. Dekho Miss Penalty & Main Memory Latency.
L2 cache add karne se AMAT kabhi worse nahi ho sakta.
False. No-L2 AMAT ko two-level se compare karo. L2 tabhi help karta hai jab ho, yaani ; yeh violate karo toh AMAT badhta hai.
Recursive multi-level AMAT inner levels ke liye global miss rates use karta hai.
False. Outer factor already L2 tak pahunche accesses tak scale down karta hai, isliye inner local hona chahiye; global rate andar plug karne par discount do baar apply ho jaata. Dekho Multi-level Cache Hierarchy.
Cache ko faster banana (lower ) AMAT reduce karne ka sabse accha lever hai.
Zyada tar false. Concretely , , ke saath: AMAT ; ko aadha karke karne par milta hai (−0.5), lekin ko aadha karke karne par milta hai (−2.5). term ( ns mein se ) dominate karta hai, isliye ya par attack karna kaafi better hai.
Bahut high hit rate wale level ke liye, uska hit time essentially poora AMAT hota hai.
True. Jaise hota hai, ho jaata hai, toh AMAT ; jaise , pe milta hai, jo ke kuch ns hone par se dominate hota hai. Isliye fast L1 ke liye matter karta hai, jo Locality of Reference se near-total-hit rakha jaata hai.
L2 ka global miss rate uske local miss rate se bada ho sakta hai.
False. Global aur ; ek non-negative number ko factor se multiply karne par yeh increase nahi ho sakta, isliye global local (sirf degenerate case mein equal).
Spot the error
" — dono outcomes ka weighted average."
Miss branch galat hai: ek miss par lagta hai, sirf nahi, kyunki aap ne cache pehle search kiya tha. Correct expected value collapse karke deta hai.
"L2 miss penalty 200 ns hai, toh recursive formula mein L1 miss penalty bhi 200 ns hai."
L1 miss penalty poore L2 subsystem ka AMAT hai (), raw DRAM latency nahi — zyada tar L1 misses L2 mein catch ho jaate hain aur DRAM tak kabhi nahi pahunchte.
"Main global L2 miss rate ke andar use karunga."
Inner local hona chahiye; global rate plug karne par L1 filtering jo outer factor mein already hai, dobaara apply ho jaati hai.
"Miss penalty mein hit time already include hai, isliye miss par total access sirf hai."
Hamari convention mein hit access se aage ka extra time hai, isliye miss time hai; ko inclusive maanna formula se contradict karta hai aur exactly se undercount karta hai.
"Kyunki L1 misses sirf 10% hain, DRAM latency AMAT ke liye koi baat nahi karta."
Yeh product ke through matter karta hai, lekin jaise aur ns ke saath DRAM trips ns add karte hain — often se bhi zyada, isliye compute karo, andaze mat lagao.
"Bada cache add karne se miss rate kam hui, toh AMAT zaroor drop hoga."
Zaroor nahi — bada cache often slower hota hai (dekho Cache Associativity & Hit Time tradeoff); agar jitna gira usse zyada badhta hai, toh AMAT better hit rate ke bawajood badhta hai.
Why questions
Hit time unconditionally kyun add hota hai, sirf hits par kyun nahi?
Kyunki har request pehle cache probe karta hai yeh jaane bina ki hit hai ya miss, dono branches mein pay hota hai; expected value mein woh shared term ek constant ban jaata hai, se independent.
Caches layer karne par miss rates multiply kyun hote hain, penalties add kyun nahi?
DRAM tak pahunchne ke liye L1 aur phir L2 miss karna padta hai; local rates use karte hue, saare accesses mein se DRAM tak pahunchne waalon ka fraction (L1 miss karne waalon ka fraction) (unme se L2 miss karne waalon ka fraction) hai — yeh nested conditional fractions ke baare mein ek definitional counting fact hai, koi statistical independence assumption nahi.
AMAT rare misses par kyun "obsess" karta hai common hits ki jagah?
mein, agar se 100–200× bada ho, toh chota bhi ko se zyada bana deta hai; jaise mein ns miss contribution versus ns hit milta hai — rare-but-huge term mean ko dominate karta hai.
AMAT define karne ke liye hum expected value (probability average) use kyun karte hain?
accesses mein, total time ; se divide karke per-access average nikaalte hain toh exactly milta hai — AMAT literally long-run mean time per access hai, jo expected value ki definition hai.
Recursive formula ke andar local miss rate sahi quantity kyun hai?
Outer already L2 ko forward kiye accesses tak restrict karta hai, isliye inner probability "given we reached L2, do we miss?" condition par honi chahiye — woh conditional fraction precisely local miss rate hai; global use karne par double-condition ho jaata.
High hit rate L2 ko pointless kyun nahi banata?
L1 miss rate bhi ns DRAM trip se multiply hoke ns per access add karta hai; un misses ko ek fast L2 se route karna (maan lo , ) ko se replace karta hai, contribution se ns tak cut karta hai.
CPU performance equation AMAT ki kyun parwah karta hai?
AMAT average memory-stall time per access set karta hai; accesses-per-instruction se multiply karne par stall cycles per instruction milta hai, jise CPU Performance Equation base CPI mein add karta hai — isliye AMAT directly total execution time badhata hai.
Edge cases
Agar ek program perfect locality rakhta ho aur har level par 0% miss rate ho, toh AMAT kya hoga?
Sirf — ke saath poora penalty bracket zero se multiply hota hai, isliye aap hamesha sirf fastest access time pay karte ho. Yeh theoretical floor hai.
Agar miss rate L1 par 100% ho lekin L2 par 0% ho, toh AMAT kya ho jaata hai?
— har access L1 miss karta hai aur L2 hit karta hai, isliye aap hamesha dono levels ka hit time pay karte ho aur DRAM kabhi nahi touch karte.
Jab miss penalty zero ho (next level utna hi fast ho jitna yeh level), toh AMAT kya hoga?
AMAT , kyunki misses mein koi extra cost nahi — ek degenerate case jahan hierarchy koi penalty nahi deta aur miss rate irrelevant ho jaata hai.
Ek workload jo har address exactly ek baar touch karta hai (koi reuse nahi) — AMAT mein kya dominate karta hai?
Miss rate compulsory (cold) misses se near drive hoti hai, isliye AMAT — caches reuse ke bina koi khaas help nahi karte. Dekho Cache Miss Rate & Miss Types (3 Cs).
Agar itna bada ho jaaye ki purani DRAM penalty se bhi exceed kare, toh kya L2 add karna ab bhi worth it hai?
Nahi — L2 tabhi help karta hai jab ho; agar toh woh inequality outright fail hoti hai, isliye har L1 miss slower ho gaya aur AMAT badhta hai, hierarchy ka purpose defeat ho jaata hai.
Jaise miss rate zero ke paas jaata hai, AMAT ka kaunsa term vanish hota hai aur kaunsa survive karta hai?
mein, term hota hai jabki fixed rehta hai — confirm karta hai ki hit time floor hai aur misses sirf uske upar add hote hain.
Connections
- Cache Miss Rate & Miss Types (3 Cs)
- Miss Penalty & Main Memory Latency
- Multi-level Cache Hierarchy
- Cache Associativity & Hit Time tradeoff
- CPU Performance Equation
- Locality of Reference