Write-through vs write-back: Foundations — Hinglish deep dive

5.4.6 · D1 · Hardware › Memory Hierarchy & Caches › Write-through vs write-back

Pehle tum parent note padh sako, usse pehle tumhe usmein aane wala har word pata hona chahiye. Yeh page har symbol ko bilkul zero se build karta hai: plain meaning → picture → topic ko uski zaroorat kyun hai. Yahan yeh assume nahi kiya gaya ki tumne pehle caches dekhe hain, siway 5.4.01-CacheFundamentals ke.

Stage: do boxes jo ek hi number rakhte hain

Is topic mein sab kuch exactly do storage boxes ke beech hota hai. Pehle unhe draw karte hain, phir naam denge.

Symbol 1 — address, aur "cached" ka matlab

Picture: figure s01 mein, wahi ghar ka number 0x100 dono boxes mein dikhta hai. Yahi hai "location cached hai" ka matlab — memory ke paas original hai, cache ke paas copy hai.

Topic ko iski zaroorat kyun: poora "write problem" tabhi exist karta hai kyunki do boxes ek hi address name karte hain. Ek write ko decide karna hota hai ki kaun si copies update karni hain.

Symbol 2 — hit aur miss

Picture: figure s02 do doorbells dikhata hai. Hit par (mint arrow) CPU ko apna answer cache se turant milta hai. Miss par (coral arrow) request puri tarah memory tak jaati hai aur wapas aati hai.

Topic ko iski zaroorat kyun: parent ke performance formulas mein sab mein ek Miss Rate term hoti hai. Write-back ki hidden cost (eviction penalty) sirf misses par fire hoti hai, toh woh formulas padhne ke liye yeh word zaroori hai.

Symbol 3 — cache line (woh unit jo move karti hai)

Picture: ek aisi bookshelf socho jo sirf poori shelves mein move karti hai, kabhi single books mein nahi. Ek book update karne ke liye bhi, poori shelf slide out hoti hai aur wapas aati hai.

Topic ko iski zaroorat kyun: yahi reason hai ki dirty bit per line hai, per byte nahi (parent Mistake 2), aur yahi reason hai ki ek writeback 64 bytes bhejta hai chahe tumne 1 byte change ki ho.

Symbol 4 — dirty bit

Picture: figure s03 do lines dikhata hai jinke paas ek chhota flag hai. Ek raised coral flag (=1) matlab "yahan unsaved changes hain — mujhe lose mat karo." Ek lowered mint flag (=0) matlab "already saved, safe to overwrite."

Topic ko iski zaroorat kyun: write-back ki poori strategy hai "memory write delay karo, lekin yaad rakho kaun si lines abhi memory ko update deni hain." Dirty bit wahi memory hai. Uske bina, write-back nahi bata sakta ki kaun se evictions ko writeback chahiye.

Symbol 5 — eviction (jagah banana)

Picture: ek full parking lot. Ek nayi car aati hai; pehle koi parked car jaani chahiye. Agar jaane wali car mein unsaved changes hain (dirty=1), toh pehle usse memory garage (writeback) mein drive karna padega, uske baad nayi car park ho sakti hai.

Topic ko iski zaroorat kyun: eviction woh waqt hai jab write-back finally memory ko pay karta hai. Parent ki " $2 \times T_{memory}$ " read-miss penalty bilkul yahi hai: ek memory access dirty purani line ko write out karne ke liye + ek nayi line fetch karne ke liye.

Symbol 6 — consistency (synchronized vs stale)

Topic ko iski zaroorat kyun: yahi woh axis hai jispar do policies baithi hain. Write-through dono boxes ko hamesha equal rakhta hai; write-back unhe kuch waqt ke liye alag hone deta hai. Jab bahut saare cores ek hi address cache karte hain, staleness coherence problem ban jaati hai — lekin woh ek baad ka note hai.

Symbol 7 — timing symbols ( $T$ , $≫$ , ns)

Parent letters ko subscripts ke saath stopwatch readings ki tarah use karta hai. Yeh scary nahi hain — har ek bas "yeh ek step kitna time leta hai" hai.

Formula Timing symbols padhna

Symbol	Plain meaning	Typical value
$T_{cache}$	cache copy likhne ka time	~1 ns
$T_{memory}$	ek memory access ka time	~100 ns
$T_{write-through}$	ek write-through store ka total time	~101 ns
$T_{write-back}$	ek write-back store ka total time (hit)	~1 ns
$≫$	"bahut bada hai"	—

$≫$ kyun matter karta hai: parent $T_{memory} ≫ T_{cache}$ likhta hai chhoti term ko drop karne ke liye justify karne ke liye. Kyunki 100 ns ~100× bada hai 1 ns se, $1 + 100 \approx 100$ : cache time ek rounding error hai. Wahi single inequality reason hai ki write-through "ek memory access cost karta hai" aur write-back "kuch nahi cost karta" (hit par).

Symbol 8 — rates aur probabilities ( $R_{write}$ , $P_{dirty}$ , Miss Rate)

Picture: imagine karo 1000 evictions ek gate se guzar rahi hain. Agar $P_{dirty} = 0.5$ hai, toh unme se 500 ek raised dirty flag carry karti hain aur memory se ho kar jaani padti hain; baaki 500 clean hain aur bas gayab ho jaati hain.

Topic ko iski zaroorat kyun: yeh "kabhi kabhi hum memory pay karte hain" ko ek number mein badal dete hain. Parent ka bus-traffic result — write-back sirf $Miss Rate \times P_{dirty} = 0.05 \times 0.5 = 0.025$ writes bus par bhejta hai, yaani 1 in 40 — in fractions ka pure multiplication hai.

Symbol 9 — write buffer

Picture: ek mailbox. Tum ek letter daalo (1 ns) aur chale jao; postal van (memory) baad mein collect karta hai. Tum sirf tabhi wait karte ho jab mailbox full ho — wahi "stall" hai.

Topic ko iski zaroorat kyun: yahi woh hai jisse write-through apna 100 ns cost zyada tar waqt chupata hai, yahi reason hai ki parent kehta hai write-through "competitive ho sakta hai." Stall condition $R_{write} > N / T_{memory}$ bas yeh kehti hai: agar letters van se zyaada fast aate hain jitni van box clear kare, box overflow ho jaata hai aur tum wait karte ho.

Yeh foundations topic ko kaise feed karte hain

Upar se neeche padho: do boxes jo ek number rakhte hain woh mismatch create karte hain; hit/miss aur dirty bit decide karte hain kab memory fix hoti hai; timing aur probability symbols us decision ko un numbers mein badal dete hain jo parent compute karta hai.

Equipment checklist

Cache[0x100] = 42 mein "0x100" ka matlab kya hai?

Cache ki copy of memory house 0x100 abhi value 42 rakhti hai — yeh ek label/address hai, arithmetic nahi.

Memory cache se roughly kitni slow hai?

Lagbhag 100× — memory ~100 ns, cache ~1 ns.

Cache hit vs miss kya hota hai?

Hit = data already cache mein hai (~1 ns); miss = wahan nahi hai, memory se fetch karna padta hai (~100 ns).

Cache line kya hai aur typically kitni badi hoti hai?

Fixed chunk (≈64 bytes) jise cache aur memory hamesha exchange karti hain — kabhi single byte nahi.

Dirty bit = 1 ka matlab kya hai?

Yeh line likhi gayi thi aur ab memory se alag hai; discard karne se pehle ise write back karna padega.

Dirty bit per line kyun hai per byte kyun nahi?

Memory transfers ek poori line ek baar mein hoti hain, aur per-byte tracking mein bahut zyaada hardware lagta.

Eviction kya hai, aur write-back finally memory kab touch karta hai?

Ek purani line ko jagah banane ke liye bahar nikalna; ek dirty evicted line us waqt memory mein write back hoti hai.

T_{memory} ≫ T_{cache}

humein kya karne deta hai?

Tiny cache time drop karne deta hai, kyunki 1 + 100 ≈ 100 — memory access dominate karta hai.

Miss Rate aur

P_{dirty}

kya measure karte hain?

Accesses ka fraction jo miss karte hain, aur evicted lines ka fraction jo dirty hain — dono 0 se 1 ke beech probabilities hain.

Depth N ka write buffer kya karta hai, aur yeh kab stall karta hai?

Write-through stores queue karta hai taaki CPU chalta rahe; stall tabhi hota hai jab writes itni fast aayein ki woh memory tak drain karne se pehle buffer full ho jaaye.