Question bank — 2-bit saturating counter predictors

False. For an alternating pattern like TNTNTN... both predictors sit at ~50% because neither can track period-2 behaviour; the 2-bit only wins on biased or loopy branches.

False. Saturating means clipping: 11 + 1 = 11 (stays), never 00. Wrapping would destroy the very hysteresis the design exists to provide.

True for the guess itself (T vs NT), but the low bit is the "strength" that stores hysteresis — it decides whether one wrong outcome flips the prediction or merely weakens it.

False. Real branches are ~60–70% taken, so 00 mispredicts most cold starts; commercial designs init to 10 (Weakly Taken) to warm-start toward the common case.

True. On loop exit the counter only drops from 11→10 (still predicts TAKEN), so the next loop entry is predicted correctly — the re-entry miss disappears.

False. Returns diminish sharply; 2-bit captures ~95% of the benefit. Extra bits add hysteresis that delays adaptation on phase changes and doubles storage per entry.

False. The steady-state cost is one miss per loop instance (the unavoidable exit), not per iteration — the body iterations are all correct once the counter saturates at 11.

False for aligned instructions. Those bits are always 00 (4-byte alignment), so they carry no discriminating information; keeping them would waste table space.

One not-taken moves 11→10 (WT), whose MSB is still 1, so it still predicts taken. You need two consecutive not-takens to reach 01 and flip the guess.

Each entry is 2 bits, not 8. Cost is $4096\times 2=8\text{Kbit}=1\text{KB}$, four times smaller than the claim.

Even one collision between an NT-biased and a T-biased branch causes destructive interference: the shared counter thrashes and both mispredict. Bigger tables reduce the probability, not the effect, of a collision.

Updates depend on the actual outcome, not on correctness: taken → increment, not-taken → decrement, regardless of what was predicted.

The 1-bit predictor mispredicts twice per steady-state instance (exit flips it to NT, re-entry flips it back to T). The 2-bit costs only the single unavoidable exit miss.

That collapses to a 1-bit predictor. The weak states are the hysteresis buffer; removing them reinstates ping-ponging on every anomaly.

Modulo a power of two is just a bit-slice (bitwise AND with $2^k-1$) — no divider, one wire cut, essentially free in hardware.

One anomaly nudges the counter one step within the same half (e.g. 11→10), so the MSB and thus the prediction survive; a genuine, repeated change eventually pushes it across the 10/01 boundary.

They are the extreme cells 00/11; a confirming outcome that keeps you there costs nothing, and a single contrary outcome only spends one "unit" of that stored momentum without changing the guess.

It bets on the common case (branches lean taken) while staying one step from flipping, so a genuinely not-taken branch corrects quickly — balancing warm-start benefit against over-commitment.

The counter tracks a majority direction, but TNTN has no majority within any short window; each outcome cancels the previous update, so it oscillates around the middle and predicts wrong every time.

A phase change means the branch's true behaviour has genuinely reversed; deep counters need many outcomes (e.g. 4 for 3-bit) to cross the middle, so they keep mispredicting throughout the transition — hysteresis becomes stubbornness.

Bimodal prediction assumes each branch has its own bias captured at its own address; correlating with history is a different, more powerful scheme — see Two-Level Adaptive Predictors and Gshare Predictor.

It only predicts direction (T/NT); the target address comes from a separate BTB (Branch Target Buffer). Direction + target together let the pipeline avoid Pipeline Hazards.

The counter climbs to 11 and stays there (saturation) — no overflow, no wrap, prediction remains strongly taken.

It's pure cold-start: the outcome is a single miss or hit depending only on the initialization versus the actual direction; hysteresis never engages because there is no second occurrence.

Yes. The counter is memoryless beyond its current 2 bits — history of how you arrived at 10 is gone; both predict taken and both respond identically to future outcomes.

Very well. Long runs let the counter saturate and it only mispredicts at the two boundaries of each run, unlike TNTN where every step is a boundary.

Two. From a saturated state (11 or 00) it takes two contrary outcomes to cross the MSB boundary and flip the guess — so at most two straight misses before the prediction adapts.

It never settles — it is driven up by the taken branch and down by the not-taken branch, oscillating around the middle and mispredicting both frequently: classic destructive aliasing.