Encoders and priority encoders: Question bank — Hardware deep dive

True or false — justify

Every valid line of a plain

2^{n}

-to-

n

encoder's truth table is "one-hot" (exactly one input HIGH).

True. The plain encoder is only defined for exactly-one-active inputs; all other rows (zero or many HIGH) are outside its promise, which is precisely why it misbehaves there.

A plain encoder and a plain decoder are exact inverses on all input combinations.

False. They are inverses only on the legal domain (one-hot in, single number out). A decoder always produces one-hot, but an encoder fed a non-one-hot pattern has no meaningful inverse — that's the whole flaw.

For the 4-to-2 plain encoder,

Y_{1} = I_{2} + I_{3}

needs no AND gate.

True. Because only one input is ever HIGH by assumption, no input can "cancel" another, so a bare OR of the bit-1 indices suffices — no suppression logic is needed.

The priority-encoder equation

Y_{1} = I_{2} + I_{3}

is identical to the plain encoder's, so priority adds nothing to bit 1.

False verdict on "nothing" — it's identical for this bit only because both indices 2 and 3 have bit-1 set, so

I_{3}

dominating

I_{2}

never changes

Y_{1}

. Bit 0 is where priority actually does work (the

\overline{I_{2}}

term).

If you swap the priority order to

I_{0} > I_{1} > I_{2} > I_{3}

(lowest wins), the equations stay the same.

False. Lowest-priority-wins requires suppressing higher indices, so the bar-terms move: e.g.

Y_{1}

would need

I_{2} \overline{I_{3}}

-style suppression. Priority direction changes which inputs get masked.

A valid bit

V

is only useful for the all-zero case.

False.

V

is the only thing distinguishing "no input" (

00

with

V = 0

) from "

I_{0}

active" (

00

with

V = 1

). It resolves the fundamental ambiguity of index 0, not merely the empty case — those are the same event described two ways.

V = I_{0} + I_{1} + I_{2} + I_{3}

can be simplified using

I_{0}

's don't-care rows.

False.

V

must go HIGH for any active input including

I_{0}

, so every input appears in the OR; there is nothing to remove without breaking the "at least one active" meaning.

For a plain 4-to-2 encoder, feeding

I_{0} = 1

alone gives output

00

, which is correct.

True. Index 0 in binary is

00

, so

Y_{1} Y_{0} = 00

is the right answer — the problem is only that

00

also appears when nothing is pressed, not that

I_{0}

's code is wrong.

Spot the error

Y_{0} = I_{1} + I_{3}

for the priority encoder, same as the plain one."

Wrong. Priority requires

Y_{0} = I_{3} + I_{1} \overline{I_{2}}

. The bare

I_{1}

would let index 1 leak into

Y_{0}

even when the higher

I_{2}

is active, giving output

11

instead of

I_{2}

10

"With

I_{1} = 1

and

I_{2} = 1

into a plain encoder we get output

3

, which is a rounding of the average of 1 and 2."

Wrong reasoning.

11 = 3

is an accident of OR-ing bits (

Y_{0}

from

I_{1}

Y_{1}

from

I_{2}

), not any average. The number is meaningless garbage, and no arithmetic interpretation is intended.

"Priority encoders need AND gates only because they have more inputs."

Wrong. The AND/NOT terms come from suppression (masking lower inputs when a higher one is active), not from input count. Even a 4-input priority encoder needs the

\overline{I_{2}}

term; a plain 4-input encoder needs none.

"A priority encoder's

V = 0

means the output bits

Y_{1} Y_{0}

are

00

Wrong. When

V = 0

the output bits are don't-care / undefined — they may be anything and must be ignored.

V = 0

is a "don't trust the number" flag, not a guarantee of

00

"For

I_{3} = 1, I_{2} = 1

into the priority encoder, output is

10

because

I_{2}

wins."

Wrong —

I_{3}

wins (highest index).

Y_{1} = I_{2} + I_{3} = 1

Y_{0} = I_{3} + I_{1} \overline{I_{2}} = 1

, giving

11 = 3

. Priority is highest-index, and

I_{3} > I_{2}

Y_{1} = I_{2} + I_{3}

means whenever

Y_{1} = 1

, input

I_{2}

is definitely active."

Wrong.

Y_{1} = 1

could come from

I_{3}

alone. An output bit being 1 tells you the index has that bit set, not which specific input is on — that's exactly why individual outputs aren't reversible without priority.

Why questions

Why does OR-ing (not AND-ing) the indices give the encoder equations?

Because under the one-hot assumption exactly one input is 1; "is bit

k

set for the active index?" becomes "is any index with bit

k

set currently active?", which is an OR.

Why does the plain encoder produce a wrong number for two simultaneous inputs rather than just picking one?

Each output bit independently ORs its own indices, so bits from two different indices merge into a code belonging to neither — there is no shared logic forcing a single consistent index.

Why is the highest index (not lowest) the conventional priority winner?

It's a design convention that maps naturally to "most significant / most urgent" numbering; the math works either way, but you must then choose which inputs to suppress accordingly.

Why does

Y_{0}

need the

\overline{I_{2}}

term but

Y_{1}

does not?

When

I_{2}

is active it must produce code

10

— bit 0 must be forced off even if

I_{1}

is also on. Bit 1 is already 1 for both indices 2 and 3, so nothing needs masking there.

Why can't we just tell "nothing pressed" from the number itself?

Because index 0 legitimately encodes to

00

, and "empty" also produces

00

from all-zero OR gates. The number line has no spare code for "none", so a separate signal

V

is required.

Why is an encoder called the "inverse of a decoder"?

A decoder maps a binary number to one active line (number → position); an encoder maps one active line back to its binary number (position → number). They undo each other on legal inputs.

Edge cases

Plain 4-to-2 encoder, all inputs 0: what is the output and is it trustworthy?

Output

00

, untrustworthy — it collides with "

I_{0}

active." Without a

V

bit you cannot tell empty from index 0.

Priority encoder, all inputs 0: what do

Y_{1} Y_{0}

and

V

read?

V = 0

;

Y_{1} Y_{0}

are don't-care and must be ignored. The valid bit is the only reliable signal here.

Priority encoder, all four inputs HIGH simultaneously: what wins?

I_{3}

(highest index):

Y_{1} = 1

Y_{0} = 1

V = 1

, output

11 = 3

. Every lower input is masked by the priority logic.

Priority encoder with

I_{2} = 1, I_{1} = 1, I_{0} = 1

(but

I_{3} = 0

): output?

I_{2}

wins:

Y_{1} = I_{2} + I_{3} = 1

Y_{0} = I_{3} + I_{1} \overline{I_{2}} = 0 + 1 \cdot 0 = 0

, so

10 = 2

. The

\overline{I_{2}}

term kills

I_{1}

's contribution.

Only

I_{1}

active in the priority encoder — does the

\overline{I_{2}}

term change anything?

No harm:

I_{2} = 0

\overline{I_{2}} = 1

, giving

Y_{0} = 0 + 1 \cdot 1 = 1

, output

01 = 1

. The mask only bites when a higher input is present.

Can a

2^{n}

-to-

n

encoder ever output every one of its

2^{n}

codes?

Yes for a priority encoder (all

n

-bit codes are reachable, index 0 via

V = 1, Y = 00

). A plain encoder also can, but only legally under strict one-hot input.

What happens to

V

if exactly one input is HIGH?

V = 1

, since

V

ORs all inputs and at least one is active — confirming the number on

Y

is meaningful.

V = 1

for one or more active inputs.

Connections

Parent topic — the full derivations these traps probe.
Karnaugh maps — where the don't-care rows and suppression terms come from.
Boolean algebra simplification — why the OR/mask equations take their minimal form.
Interrupt controllers — real hardware where "highest priority wins" is the whole point.
Decoders — the inverse device; contrast its one-hot output with the encoder's ambiguity.
Combinational circuits — the memoryless family these belong to.