Two's complement signed numbers: Question bank — Hardware deep dive

A quick recap of every symbol used below, so nothing appears unexplained:

Definition Symbols in one place

$n$ = the number of bits (e.g. 8). The bits are $b_{n - 1} \dots b_{1} b_{0}$ , where $b_{0}$ is the rightmost (least significant) bit and $b_{n - 1}$ is the leftmost (most significant, the MSB).
$\overset{x}{ˉ}$ = the bitwise NOT of $x$ : flip every 0 to 1 and every 1 to 0.
$2^{n}$ = the total count of bit patterns available (for 8 bits, $256$ ).
$(mod 2^{n})$ = "the remainder after wrapping around a circle of $2^{n}$ steps" — the clock arithmetic the machine actually does.
$\oplus$ = XOR: outputs 1 only when the two inputs differ.
$C_{n - 1}$ = the carry into the MSB column; $C_{n}$ = the carry out of the MSB column (the carry that would fall off the top).

True or false — justify

The most-significant bit is only a plus/minus label.

False. It carries a real negative weight

- 2^{n - 1}

. In Sign-magnitude representation it is a mere label, but in two's complement 1000 0000 equals

- 128

, not "minus zero-magnitude."

Every

n

-bit two's complement pattern names a distinct number.

True. There are

2^{n}

patterns and exactly

2^{n}

integers in

[- 2^{n - 1}, 2^{n - 1} - 1]

, a perfect one-to-one match — unlike sign-magnitude which wastes a pattern on a second zero.

The range

[- 2^{n - 1}, 2^{n - 1} - 1]

is symmetric about zero.

False. There is one more negative than positive because the single zero code frees one extra pattern for negatives. For 8 bits:

[- 128, + 127]

Discarding the carry-out of a signed addition loses information and corrupts the answer.

False. The carry-out is worth

2^{n}

, and

2^{n} \equiv 0 (mod 2^{n})

, so dropping it is exactly correct for signed arithmetic. Losing it is required, not a bug.

A carry-out of 1 always means the signed answer overflowed.

False. Carry-out is the unsigned overflow signal; signed overflow is

C_{n - 1} \oplus C_{n}

. E.g.

7 - 5

produces a carry-out yet the signed result (

2

) is perfectly correct.

Two's complement uses a separate circuit for subtraction.

False. Subtraction is just "add the negative":

a - b = a + (\overset{ˉ}{b} + 1)

. The same Full adder chain does both — that reuse is the whole point of the scheme.

The lower bits of a negative number give its magnitude.

False. For

- 5 =

1111 1011, the low 7 bits read as

123

, not

5

. To read the magnitude you must first negate (invert + add 1).

Inverting all the bits of

x

gives

- x

False. Inverting gives

\overset{x}{ˉ} = 2^{n} - 1 - x

, which is

- x - 1

. You must add 1 to reach

- x

. That "off by one" is exactly what One's complement leaves unfixed.

Adding two positive numbers can never overflow in two's complement.

False. Two positives can exceed

+ 2^{n - 1} - 1

and roll into the negative half.

100 + 50

in 8 bits gives

- 106

: overflow.

Zero has exactly one representation in two's complement.

True. Only 000...0 is zero; negating it gives

\overset{ˉ}{0} + 1 = (2^{n} - 1) + 1 = 2^{n} \equiv 0

. This single zero is what makes the range asymmetric.

Spot the error

"To negate 0000 0101, I flip the bits to 1111 1010 and I'm done — that's

- 5

The +1 step is missing. 1111 1010 is actually

- 6

; adding 1 gives 1111 1011

= - 5

. Flipping alone yields

- x - 1

, not

- x

- 128

in 8 bits, negated, should be

+ 128

+ 128

doesn't fit in signed 8 bits (max is

+ 127

). Negating 1000 0000 gives 1000 0000 again —

- 128

is its own "negative," a genuine overflow with no positive twin.

"The number 1111 1111 is huge — it's near the top of the range."

In unsigned it's

255

, but as signed two's complement it's

- 1

(the pattern one step below 0000 0000 on the wrap-around clock). Interpretation depends entirely on whether we agreed signed or unsigned.

"Since

C_{n} = 0

here, there's definitely no overflow."

Carry-out alone can't decide signed overflow. You need

C_{n - 1} \oplus C_{n}

. With

C_{n - 1} = 1

and

C_{n} = 0

, XOR is

1

— overflow, despite

C_{n} = 0

"Sign-extending 1010 from 4 to 8 bits gives 0000 1010."

Wrong padding. 1010 is

- 6

; you must copy the sign bit, giving 1111 1010, which is still

- 6

. Padding with zeros would turn it into

+ 10

"To multiply a two's complement number by 2, shift left — the sign is preserved automatically."

Only if no overflow occurs. Shifting 0100 0000 (

64

) left gives 1000 0000 (

- 128

): the sign flipped. The shift trick is safe only within range.

Why questions

Why does redefining the MSB weight as

- 2^{n - 1}

(instead of

+ 2^{n - 1}

) make one adder work for both signed and unsigned?

Because ordinary binary addition already computes results

mod 2^{n}

; the wrap-around it produces is the modular reduction signed arithmetic needs, so the adder never has to know which interpretation you meant.

Why does adding 1 after inverting fix the negation?

Because

x + \overset{x}{ˉ} = 2^{n} - 1

(all ones), which is one short of

2^{n}

. Adding 1 reaches

2^{n} - x

, and

2^{n} - x \equiv - x (mod 2^{n})

Why is the carry-out safe to discard but the overflow flag is not?

The carry-out equals

2^{n} \equiv 0

, so it vanishes harmlessly. Overflow means the true answer left the representable range, so the stored bits are genuinely wrong — that must be flagged.

Why does two's complement have a single zero while sign-magnitude has two?

Sign-magnitude allows both "+0" and "−0" patterns. Two's complement's wrap-around makes negating zero return the same code, collapsing them into one.

Why can two same-sign numbers overflow but two opposite-sign numbers never can?

Opposite signs move the result toward zero, staying in range. Same signs push away from zero and can cross the boundary — the only way to leave

[- 2^{n - 1}, 2^{n - 1} - 1]

via addition.

Why is the [[Modular arithmetic|mod

2^{n}

]] view the "real" story rather than the negative-weight formula?

The hardware physically does clock-arithmetic mod

2^{n}

; the negative-weight formula is just a convenient human way to read out which residue we agreed to call negative. Both describe the same circle.

Edge cases

Negate the most negative number

- 2^{n - 1}

You get

- 2^{n - 1}

back (overflow). Inverting

1000 \dots 0

gives

0111 \dots 1

, and adding 1 wraps to

1000 \dots 0

again. It has no positive counterpart.

What is 1111...1 (

n

ones) as a signed value, for any

n

Always

- 1

. It sits one step below 0 on the wrap-around clock, and the weights sum to

- 2^{n - 1} + (2^{n - 1} - 1) = - 1

The smallest positive and its negation: negate 0000 0001.

Flip to 1111 1110, add 1 → 1111 1111

= - 1

. Clean, no overflow — the symmetric pair

+ 1/ - 1

both exist.

In 1-bit two's complement, what values exist?

Only the bit itself with weight

- 2^{0} = - 1

: pattern 0 is

0

, pattern 1 is

- 1

. Range is

[- 1, 0]

— no positives at all.

Adding

+ 1

to the largest positive

2^{n - 1} - 1

0111...1 + 1 = 1000...0

= - 2^{n - 1}

. The result silently overflows to the most negative number — the top edge of the range wraps to the bottom.

Recall One-line self-test before you leave

Give the single sentence that explains why two's complement lets one adder subtract. Answer ::: Subtracting $b$ equals adding $\overset{ˉ}{b} + 1$ (which is $- b mod 2^{n}$ ), and binary addition already works mod $2^{n}$ , so no dedicated subtractor is needed.

Connections

Parent · Two's complement — the derivations these traps stress-test
Sign-magnitude representation — source of the "MSB is just a label" trap
One's complement — source of the "invert is enough" trap
Overflow and carry flags — the $C_{n - 1} \oplus C_{n}$ vs carry-out confusion
Modular arithmetic — why discarding carry is exact
Full adder — the one circuit that does both add and subtract