MOSFET as a switch: Question bank — Hardware deep dive

Before you start, recall the load-bearing symbols, in plain words:

$V_{GS}$ ::: the gate-to-source voltage — the "hand squeezing the hose", the control knob.
$V_{D S}$ ::: the drain-to-source voltage — the voltage the closed switch drops, not a control.
$V_{T H}$ ::: the threshold — the minimum $V_{GS}$ that creates a channel at all.
$R_{D S (o n)}$ ::: the small resistance a fully-ON MOSFET presents between drain and source.
$k$ ::: a device constant, $k = μ_{n} C_{o x} W / L$ — mobility $μ_{n}$ times oxide capacitance per area $C_{o x}$ times the channel shape ratio $W / L$ . Bigger $k$ = stronger transistor.

Picture 1 — where the channel lives

The figure below is the anatomy every answer refers to: gate (G) sitting on a thin oxide insulator, with source (S) and drain (D) on either side. When $V_{GS}$ exceeds $V_{T H}$ , a thin red conducting channel appears under the oxide, bridging source to drain. Notice the body diode drawn in red between the body/source and the drain — it is always physically present.

Picture 2 — the I–V regions (triode vs saturation)

This is the plot the words "triode" and "saturation" actually mean. Each curve is $I_{D}$ versus $V_{D S}$ for a fixed $V_{GS}$ . Near the origin the curves rise almost straight — that near-linear slice is the triode (ohmic) region where the MOSFET is a resistor, and its slope is $1/ R_{D S (o n)}$ . To the right the curves flatten into saturation, where current is nearly constant. The red dashed boundary $V_{D S} = V_{GS} - V_{T H}$ separates them. A switch lives in the red-boxed deep-triode corner near the origin, never out in saturation.

Picture 3 — where $R_{D S (o n)} = 1/ [k (V_{GS} - V_{T H})]$ comes from

The ON-resistance formula is not magic — it is the slope of the triode curve at the origin. Start from the triode current, zoom into small $V_{D S}$ , and the resistance falls right out.

Picture 4 — the switching waveforms (why speed costs energy)

A MOSFET does not flip instantly. The gate–drain capacitance $C_{G D}$ (the Miller capacitance) must be charged before the drain voltage can move. During that flat "Miller plateau" the device is stuck in the resistive middle — $V_{D S}$ and $I_{D}$ are both large at once, so it dissipates a burst of energy $E_{o n}$ (and $E_{o f f}$ on the way back). The figure overlays $V_{GS}$ , $V_{D S}$ and $I_{D}$ against time; the red shaded overlap is the switching-loss energy.

True or false — justify

True or false: A MOSFET's ON/OFF state is decided by the voltage across drain and source.

False. It is decided by

V_{GS}

relative to

V_{T H}

;

V_{D S}

is merely the drop that results once the switch is closed. See Threshold voltage VTH.

True or false: A closed (ON) MOSFET behaves like a perfect

0 Ω

short.

False. It behaves like a small but real resistor

R_{D S (o n)}

(milliohms to ohms) that dissipates

I_{D}^{2} R_{D S (o n)}

as heat.

True or false: To use a MOSFET as a switch we bias it in the saturation region.

False. Saturation is for amplifiers (constant current). A switch wants either cut-off (OFF) or deep triode (ON, tiny

V_{D S}

). See Triode vs Saturation regions.

True or false: Raising

V_{GS}

well above

V_{T H}

lowers the ON-resistance.

True.

R_{D S (o n)} = 1/ [k (V_{GS} - V_{T H})]

, so a larger overdrive

V_{GS} - V_{T H}

shrinks the denominator and the resistance.

True or false: Because the gate is insulated, controlling a MOSFET switch costs essentially zero steady current.

True in steady state — the oxide blocks DC gate current. But switching the gate charges/discharges its capacitance (including

C_{G D}

), which does draw pulses of current.

True or false: In a low-side switch, when the MOSFET is OFF the output sits near

V_{D D}

True. With no channel, no current flows through the load resistor, so there is no voltage drop across it and the drain node floats up to

V_{D D}

(HIGH).

True or false: Doubling the channel width-to-length ratio

W / L

makes a better (lower-resistance) switch.

True.

k = μ_{n} C_{o x} W / L

, and larger

k

lowers

R_{D S (o n)}

— a wider, shorter channel carries current more easily.

True or false: An N-channel MOSFET with its gate tied to

V_{D D}

makes a reliable high-side switch.

False. When ON the source rises toward

V_{D D}

, so

V_{GS} = V_{G} - V_{S} \to 0 < V_{T H}

and it turns itself OFF. See Low-side vs High-side switching.

True or false: A MOSFET is current-controlled, like a BJT.

False. A MOSFET is voltage-controlled (

V_{GS}

); a BJT is current-controlled (

I_{B}

). Compare with BJT as a switch.

True or false: If

V_{GS} = V_{T H}

exactly, the switch is solidly ON.

False. At exactly threshold the channel is only just forming — barely conducting, huge

R_{D S (o n)}

, effectively neither a good ON nor a clean OFF.

True or false: An OFF MOSFET (

V_{GS} < V_{T H}

) conducts exactly zero current.

False. A small subthreshold leakage current still flows and rises exponentially as

V_{GS}

nears

V_{T H}

— negligible for a power switch but important for low-power/standby design.

Spot the error

V_{T H} = 2

V and I applied

V_{D S} = 10

V with the gate grounded, so plenty of current flows."

Error: gate is grounded, so

V_{GS} = 0 < V_{T H}

→ cut-off, no channel, no conduction (only tiny leakage). Drain voltage alone cannot open the switch — and excess

V_{D S}

risks breakdown.

"For minimum loss I'll drive the gate to just

0.1

V above

V_{T H}

Error: barely above threshold gives a huge

R_{D S (o n)}

and possibly saturation, so lots of heat. Drive the gate hard (full enhancement) to sit deep in triode.

"The datasheet lists

R_{D S (o n)}

, so a closed switch drops zero volts."

Error: a finite

R_{D S (o n)}

means a finite drop

V_{D S} = I_{D} R_{D S (o n)}

. At

3

A through

0.05 Ω

that is

0.15

V, not zero.

"Low-side switch: output is HIGH when the transistor is ON because it's conducting."

Error: ON means

R_{D S (o n)} ≪ R_{L}

, so the drain node is pulled almost to ground → output LOW. The topology inverts.

"To make the switch conduct more current I should increase

V_{D S}

Error: in deep triode raising

V_{D S}

just moves you toward saturation where current saturates; and it doesn't change the ON/OFF state. To carry more current cleanly, lower

R_{D S (o n)}

(more overdrive, bigger device).

P_{co n d} = V_{D D} \times I_{D}

is the conduction loss in the ON MOSFET."

Error: the MOSFET only dissipates over its own drop, so

P_{co n d} = I_{D}^{2} R_{D S (o n)} = V_{D S} I_{D}

, using the tiny

V_{D S}

— not the full supply

V_{D D}

"I picked a fast gate driver, so switching losses don't matter."

Error: even a fast driver must still charge

C_{G D}

(Miller); the Miller plateau and the finite transition time cost

E_{o n} + E_{o f f}

each cycle, and that loss scales with switching frequency.

Why questions

Why do datasheets obsess over

R_{D S (o n)}

if a switch is "just on or off"?

Because ON is not ideal: the real device dissipates

I_{D}^{2} R_{D S (o n)}

, so a smaller

R_{D S (o n)}

means less heat and higher efficiency. See R_DS(on) and switching losses.

Why is

V_{GS}

, not

V_{D S}

, the deciding variable for switch state?

The channel forms by inverting the surface under the gate, which depends on the field from gate to source. Drain voltage only shapes the channel once it exists; it cannot create one.

Why do we neglect the

V_{D S}^{2} /2

term when the switch is closed?

A good closed switch drops only millivolts, so

V_{D S}

is small and

V_{D S}^{2} /2

is a second-order term — dropping it gives the clean linear

I_{D} \approx k (V_{GS} - V_{T H}) V_{D S}

that reads out

R_{D S (o n)}

Why does a P-channel device make high-side switching easier than N-channel?

A P-channel turns on with the gate below its source, and its source is already at

V_{D D}

, so no gate voltage above the supply (bootstrap/charge pump) is needed. See Low-side vs High-side switching.

Why does more overdrive physically lower

R_{D S (o n)}

More overdrive

V_{GS} - V_{T H}

pulls more mobile charge into the channel, making it denser and more conductive — like squeezing the hose valve wider open.

Why is the gate's near-zero steady current the whole selling point of a MOSFET switch?

It lets a tiny, gentle control signal command large drain currents, because the insulated gate needs voltage (pressure), not sustained current (pumping). See Enhancement vs Depletion MOSFET.

Why can rapid switching still cause loss even if

R_{D S (o n)}

is tiny?

During each transition the gate capacitance (especially the Miller

C_{G D}

) must be charged/discharged, and the device briefly passes through the resistive middle where

V_{D S}

and

I_{D}

are both large — these switching losses grow with frequency, on top of conduction loss.

Why does the Miller capacitance

C_{G D}

slow the turn-on more than the plain gate–source capacitance?

Because as the drain voltage swings,

C_{G D}

demands extra charge from the driver at a nearly constant gate voltage (the Miller plateau), stalling

V_{GS}

and stretching the transition.

Edge cases

Edge case:

V_{GS}

exactly at

V_{T H}

— is the switch ON or OFF?

Neither cleanly — the channel is right at the onset of forming, so it conducts weakly with enormous

R_{D S (o n)}

. Real switches must stay well above or below threshold.

Edge case:

V_{GS}

far above

V_{T H}

but

V_{D S}

also large (heavy load, weak drive).

The device may leave triode and enter saturation, where current is limited and the drop

V_{D S}

is large → big heating. The "closed switch" model only holds while

V_{D S}

stays small.

Edge case: gate left floating (not driven).

Undefined state — stray charge/leakage can drift

V_{GS}

anywhere, so the switch may partially turn on unpredictably. Real designs add a pull-down resistor to force a definite OFF.

Edge case: N-channel high-side switch, source pulled up to

V_{D D}

when conducting.

As the source rises,

V_{GS} = V_{G} - V_{S}

collapses toward

0

and the switch shuts off — you need a gate voltage boosted above

V_{D D}

to keep it ON.

Edge case: load current

I_{D} \to 0

with the switch ON.

Then

V_{D S} = I_{D} R_{D S (o n)} \to 0

and conduction loss

I_{D}^{2} R_{D S (o n)} \to 0

— an unloaded closed switch dissipates essentially nothing (switching losses aside).

Edge case:

R_{D S (o n)}

compared with

R_{L}

in a low-side switch when

R_{L}

is also very small.

R_{L}

approaches

R_{D S (o n)}

, the ON output no longer reaches ~0 V; the divider

V_{o u t} = V_{D D} R_{D S (o n)} / (R_{D S (o n)} + R_{L})

leaves a noticeable residual voltage. Clean logic needs

R_{D S (o n)} ≪ R_{L}

Edge case:

V_{D S}

goes negative (drain below source), e.g. an inductive load kicks back.

The intrinsic body diode forward-conducts and clamps the reverse voltage, carrying current around the channel. Useful for freewheeling, but the body diode is slow and lossy, so a Schottky is often added in parallel.

Edge case: the MOSFET heats up during heavy conduction — what happens to

R_{D S (o n)}

and

V_{T H}

R_{D S (o n)}

rises with temperature (mobility drops), which raises loss — but this is self-limiting and lets MOSFETs current-share.

V_{T H}

falls slightly with temperature, and subthreshold leakage grows, worsening OFF-state losses in hot conditions.

Edge case:

V_{GS}

just below

V_{T H}

— is there truly zero drain current?

No — subthreshold conduction gives a small current that increases roughly exponentially as

V_{GS}

approaches

V_{T H}

. Negligible for a power switch, but it sets standby leakage in low-power CMOS. See Logic gates from MOSFETs (CMOS).

Connections

MOSFET as a switch (parent)
Triode vs Saturation regions
Threshold voltage VTH
R_DS(on) and switching losses
Low-side vs High-side switching
BJT as a switch
Enhancement vs Depletion MOSFET
Logic gates from MOSFETs (CMOS)