Worked examples — Why silicon dominates over germanium
Before any numbers, let us pin down the symbols so nothing is used before it is built.
The scenario matrix
Every question this topic asks lives in one of these cells. The worked examples below are each tagged with the cell(s) they cover, so together they fill the whole grid.
| Cell | Case class | What makes it tricky | Covered by |
|---|---|---|---|
| A | Baseline leakage ratio Si vs Ge at 300 K | Getting the factor-of-2 and the exponent right | Ex 1 |
| B | Sign / direction of the effect | Which way does more gap push leakage? Easy to flip | Ex 2 |
| C | Non-standard temperature (hot chip, 400 K) | changes; must rescale | Ex 3 |
| D | Limiting behaviour: and | Degenerate ends of the curve | Ex 4 |
| E | Degenerate/equal case: | What if the gaps were identical? | Ex 5 |
| F | Failure temperature (when meets ) | Solving the exponential for | Ex 6 |
| G | Oxide / process word problem (no exponentials) | Reasoning, not arithmetic | Ex 7 |
| H | Real-world design choice (RF vs CPU) | Trade-off judgement | Ex 8 |
| I | Exam twist: spot the wrong formula | The vs trap | Ex 9 |
Recall The master formula everything below uses
When we compare two materials at the same temperature, the prefactor is (roughly) the same, so it cancels and only the exponential ratio survives.
Example 1 — Cell A: the baseline leakage ratio
Step 1 — Write the ratio, cancelling the shared prefactor. Why this step? Both materials sit at the same , so divides out. Dividing two exponentials subtracts their exponents — that is exactly where comes from.
Step 2 — Plug in the numbers. Why this step? We need the exponent as a plain number before we can exponentiate. Notice the subtraction gives a positive exponent — Ge (smaller gap) ends up with more carriers, which is the sign we expect.
Step 3 — Exponentiate.
Verify: ✓. Cross-check against the parent's absolute numbers: — same order of magnitude (the small mismatch is the prefactor we dropped). Units: a ratio, dimensionless ✓.
Example 2 — Cell B: which direction does bandgap push leakage?
Step 1 — Look at the exponent's sign. For any single material, . The exponent is , which is negative, and it grows more negative as grows. Why this step? The sign of the exponent tells you whether increasing makes the factor bigger or smaller. More negative exponent → smaller .
Step 2 — Compare the two. Bigger (silicon) → more negative exponent → smaller . So silicon has fewer intrinsic carriers. Why this step? This directly contradicts the claim; the claim confused "big gap" with "many carriers," but the gap is the barrier, not the supply.
Verify: From Ex 1, Ge/Si , so germanium (small gap) has more, silicon has fewer. The claim is false ✓.
Example 3 — Cell C: a hot chip at 400 K
Step 1 — Recompute at 400 K. Why this step? is temperature-dependent; using the 300 K value would be wrong. Heat now pays for bigger jumps.
Step 2 — New exponent. Why this step? Same eV, but a larger in the denominator shrinks the exponent — the gap "matters less" when heat is plentiful.
Step 3 — Exponentiate.
Verify: At 400 K the ratio () is smaller than at 300 K () ✓ — makes sense: hotter means even silicon's tall gate gets more jumpers, so the gap between the two materials narrows. ✓.
Example 4 — Cell D: the two limits, and

Step 1 — The cold limit . As , the exponent , so . This crushes to zero faster than the polynomial can. Result: . Why this step? An exponential of beats any power of — look at the curve on the figure hugging zero on the left. Physically: no heat, no jumpers, a perfect insulator.
Step 2 — The hot limit . As , the exponent , so , and . Result: (both bands flood; the semiconductor behaves almost metallic and any dopant is swamped). Why this step? Once heat vastly exceeds the gap, the barrier is irrelevant and only the prefactor grows — the right end of the figure shoots up.
Verify: The exponential dominance at small is the standard result for ; at large , so ✓. Both consistent with "cold = insulator, hot = leaky."
Example 5 — Cell E: the degenerate case, equal gaps
Step 1 — Exponent with . Why this step? Equal gaps make the numerator vanish. This is the degenerate boundary between "Ge leakier" and "Si leakier."
Step 2 — Exponentiate. Why this step? means identical intrinsic carrier counts (once we ignore the tiny prefactor differences). No leakage advantage either way from the gap alone.
Verify: exactly ✓. Sanity: this tells you the entire leakage argument for silicon rests on the 0.46 eV gap difference — remove it and the electrical advantage disappears (only oxide/cost/mobility would then decide).
Example 6 — Cell F: solving for the failure temperature
Step 1 — Set up the ratio of at two temperatures. Ignoring the slow prefactor, Why this step? Dividing the formula at by the formula at 300 K cancels every constant except the changing exponential — this isolates .
Step 2 — Plug the failure condition , , so the left side is . Why this step? Taking turns the exponential into a solvable linear equation in . And has units of kelvin — a natural "gap temperature."
Step 3 — Solve for . , so Why this step? We wanted the temperature at which leakage catches the doping; solving the linear equation gives it.
Verify: K C. This is hotter than the real ~150 °C rating because we ignored the prefactor and used a simplistic threshold — but the direction is right: silicon survives well past boiling water. Recompute the same for Ge () and you get a much lower , matching "Ge fails first." Numeric self-check in VERIFY ✓.
Example 7 — Cell G: the oxide word problem (no exponentials)
Step 1 — Grow the oxide. Heat silicon in oxygen: it grows SiO₂, a hard glassy insulator bonded to the crystal. Germanium grows GeO₂. Why this step? The whole planar process starts from a native oxide; without one there is nothing to pattern.
Step 2 — Handle a wet cleaning bath. SiO₂ shrugs off water and most chemicals. GeO₂ is water-soluble — it dissolves in the very rinse steps used everywhere in fabrication. Why this step? Chip fabs run hundreds of wet steps; a dissolving mask means no reliable pattern survives.
Step 3 — Use it as a MOSFET gate insulator. The gate oxide must hold voltage without leaking (see MOSFET operation and the gate oxide). SiO₂ is stable and insulating; GeO₂ is thermally unstable and leaky. Why this step? No stable gate oxide → no reliable transistor → no integrated circuits.
Verify: Consistency check with the mnemonic BOAT (Bandgap, Oxide, Abundant, Temperature): this example is the "O." Conclusion — silicon's oxide is the manufacturing winner, independent of the leakage argument ✓.
Example 8 — Cell H: the real design choice
Step 1 — Identify the dominant constraint for the CPU. A CPU packs billions of transistors, runs hot, and must not leak. Leakage and thermal stability dominate → large bandgap wins → silicon. Why this step? From Ex 1 and Ex 6, silicon's gap keeps leakage ~ lower and its failure temperature far higher — exactly what a dense hot chip needs.
Step 2 — Identify the dominant constraint for the RF amp. At 60 GHz, raw switching speed matters most, and speed tracks carrier mobility: vs cm²/V·s. Mobility dominates → germanium content helps → SiGe. Why this step? Few transistors, less leakage worry; here the trade-off flips toward Ge's strength.
Verify: Mobility ratio — Ge carriers move ~2.6× faster, consistent with the parent's "Ge intrinsically faster" claim. Matches the [!mistake] warning: mobility is one axis, and it only wins where manufacturability isn't the bottleneck ✓.
Example 9 — Cell I: spot the exam trap
Step 1 — Compute the wrong (no-2) version. Why this step? Dropping the 2 doubles the exponent, inflating the ratio by roughly its own square.
Step 2 — Recall where the 2 comes from. The pair-generation product obeys , but , and the square root halves the exponent → . So the correct exponent uses . Why this step? This is the exact trap flagged in the parent's mistakes list; the physics of pairs forces the factor of 2.
Step 3 — Compare. Correct: (Ex 1). Wrong: — off by about (the missing square root). Why this step? Showing the size of the error makes the trap memorable.
Verify: ✓ — the wrong answer is exactly the correct one squared, confirming the missing / factor-of-2. See Fermi-Dirac distribution and thermal excitation for why the exponential appears at all.
Wrap-up recall
Recall Which cells did we cover?
Baseline ratio ::: Ex 1 (A) Sign/direction of the effect ::: Ex 2 (B) Different temperature ::: Ex 3 (C) Both limits T→0 and T→∞ ::: Ex 4 (D) Degenerate equal-gap case ::: Ex 5 (E) Failure temperature ::: Ex 6 (F) Oxide/process reasoning ::: Ex 7 (G) Real design trade-off ::: Ex 8 (H) Formula trap (2k_BT) ::: Ex 9 (I)
Connections
- Why silicon dominates over germanium
- Bandgap and intrinsic carrier concentration
- Intrinsic vs extrinsic semiconductors
- Doping n-type and p-type
- MOSFET operation and the gate oxide
- SiO2 and the planar process
- Carrier mobility and drift velocity
- Fermi-Dirac distribution and thermal excitation