SpaceWire — high-speed serial link standard for spacecraft: Visual walkthrough

This page is the visual companion to SpaceWire. If a term here feels rushed, its home is the parent note.

Step 1 — What "sending a bit" even means

WHAT. A wire between two chips is just a piece of metal that we hold at one of two voltages: a high voltage (call it 1) or a low voltage (call it 0). To send the message 1 0 1 1, the sender chops time into equal slots — one slot per bit — and sets the wire to the matching level in each slot. One slot's worth of time is called a bit period, written $T$ .

WHY. Before we can talk about "recovering timing" we must agree on what timing is: it is knowing where each bit period $T$ starts and ends. If the receiver misjudges those boundaries, it reads the wrong slot and the message is garbage.

PICTURE. Figure s01 shows the four bit slots as gray columns, each of width $T$ , and the Data line stepping between high and low to spell 1 0 1 1.

Figure — SpaceWire — high-speed serial link standard for spacecraft

Step 2 — The naïve idea: send a separate clock wire, and why it breaks

WHAT. The obvious fix for "where does each slot start?" is to add a second wire — a clock — that ticks up-and-down once per bit. The receiver reads the Data wire every time the clock ticks. This is exactly how a simple parallel bus works.

WHY (this is the crux). In a spacecraft the two wires run side by side for metres, through temperature swings and radiation. They stretch and age at slightly different rates. So the clock's tick and the data's slot boundary slowly slide apart. That sliding gap is called skew. Once skew grows past half a bit period, the receiver samples the wrong slot. A shared clock is a single fragile reference that the environment attacks directly.

PICTURE. Figure s02 draws Data and a separate Clock aligned on the left, then shows the Clock drifting rightward (the orange arrow) until its tick lands inside the wrong Data slot — the red "wrong sample" marker.

The lesson: we must make the timing live inside the same wires that carry the data, so that whatever stretches one stretches the other identically.

Step 3 — The single rule that saves us: guarantee exactly one edge per slot

WHAT. An edge is a moment a wire switches level (low→high or high→low). Here is the design goal, stated plainly: make sure exactly one edge happens somewhere in every bit period. If that is true, the receiver just counts edges — one edge, one new bit — and never needs an external clock.

WHY. Look at what the lone Data wire does on a run of identical bits, say 1 1 1. Its level is high, high, high — flat, no edges at all. During that flat run the receiver has no way to tell three slots from one long one. So Data alone cannot guarantee "one edge per slot". We need a helper that produces an edge exactly when Data stays flat.

PICTURE. Figure s03 shows the pattern 1 1 0 0 1. The top row (Data) is flat across the two 1s and flat across the two 0s — the red boxes mark the "silent" slots where Data gives no edge. Those silent slots are precisely where a helper must act.

Step 4 — Meet the Strobe wire and its toggle rule

WHAT. Add a second wire called Strobe, written $S$ . Its rule is one line:

Strobe toggles in a slot if and only if Data did not change from the previous bit.

In words with symbols, letting $b_{n}$ be the value of bit number $n$ :

$S (n) = S (n - 1) \oplus \overline{(b_{n} \oplus b_{n - 1})}$

Reading it piece by piece, right where each symbol sits:

$b_{n} \oplus b_{n - 1}$ — the symbol $\oplus$ is XOR, which outputs 1 when its two inputs differ. So this whole bracket is 1 exactly when the bit changed (Data already made an edge).
$\overline{(\dots)}$ — the overbar is NOT, it flips the value. So $\overline{b_{n} \oplus b_{n - 1}}$ is 1 exactly when the bit stayed the same (Data was silent).
$S (n - 1) \oplus (\dots)$ — XOR-ing the previous Strobe with a 1 flips it (a toggle); XOR-ing with a 0 leaves it unchanged.

Put together: if Data was silent this slot, flip Strobe; otherwise leave Strobe alone. Exactly the helper Step 3 demanded.

WHY XOR and NOT, and not some other operation? We needed a "did the bit change?" detector — that is literally the definition of XOR (differ → 1). We needed "the opposite of that" — that is NOT. And we needed "flip a wire on command" — that is XOR-with-1 (a controlled toggle). Each tool answers one precise sub-question; nothing fancier is required.

PICTURE. Figure s04 draws Data and Strobe together for 1 1 0 1 0 0. A green tick sits under every slot where Strobe toggles (the repeated-bit slots); a blue tick sits under every slot where Data toggles. Notice the ticks never overlap and never both go missing.

Step 5 — Prove the promise: exactly one edge per slot, always

WHAT. We now check every possible slot and confirm the "exactly one edge" promise can never fail.

WHY. A rule you cannot break in any case is worth trusting; a rule that works "usually" corrupts data the one time it slips. So we enumerate — there are only two cases.

Case A — the bit changed ( $b_{n} \neq = b_{n - 1}$ ): Data toggles (one edge on Data). The bracket $\overline{b_{n} \oplus b_{n - 1}}$ is 0, so Strobe stays flat. Result: exactly one edge, on Data.

Case B — the bit stayed the same ( $b_{n} = b_{n - 1}$ ): Data stays flat. The bracket is 1, so Strobe toggles. Result: exactly one edge, on Strobe.

There is no third case — two bits either match or differ. So every slot has exactly one edge, either on Data or on Strobe. Timing is now permanently recoverable from the two wires alone.

PICTURE. Figure s05 is a two-cell truth table drawn as a picture: left cell "bit changed → Data edge, Strobe flat", right cell "bit same → Strobe edge, Data flat", each with a mini-waveform. A big check-mark spans both: "one edge per slot".

Step 6 — The receiver rebuilds the clock: XOR the two edge streams

WHAT. The receiver watches for edges on either wire. Combining "did Data change?" OR "did Strobe change?" gives one tick per slot — that reconstructed tick train is the recovered clock. Formally the receiver forms:

$RecoveredClock (n) = Data (n) \oplus Strobe (n)$

Term by term:

$Data (n)$ — the current level of the Data wire.
$Strobe (n)$ — the current level of the Strobe wire.
$\oplus$ — XOR again: because exactly one of the two flipped this slot, the value of this XOR flips once per slot. A signal that flips once per slot is a clock ticking once per slot.

Then the receiver samples the Data wire on each clock edge to read $b_{n}$ directly. Data was never encoded — it is read straight off its wire, timed by the self-made clock.

WHY. Because clock and data now ride the same twisted pairs, any stretch or radiation-slowing hits both identically — the skew of Step 2 cannot open up. The reference lives inside the signal.

PICTURE. Figure s06 stacks four rows for 1 0 0 1 1: Data, Strobe, then the recovered clock (Data XOR Strobe) with one clean tick per slot, then blue sampling arrows dropping onto Data at each tick and reading out 1 0 0 1 1.

Step 7 — The degenerate case: an all-same run (the "flat forever" test)

WHAT. Push the design to its worst input: a long run of identical bits, 1 1 1 1 1. This is the case that killed the lone-Data idea in Step 3.

WHY. If the encoding survives its nastiest input, it survives everything. All-same is nastiest because Data is perfectly flat the whole time — every slot is "silent" on Data.

Walking Step 4's rule: every bit matches its predecessor, so every slot toggles Strobe. Strobe becomes a steady square wave ticking once per slot. XOR-ing flat Data with a toggling Strobe gives a clean recovered clock. The exact case that broke the naïve scheme is the case DS handles most cleanly.

The mirror degenerate case — alternating bits 1 0 1 0 1 — makes Data toggle every slot and Strobe stay flat; same guarantee, roles swapped. Between these two extremes, every real pattern is just a mix, and Step 5 already covered every slot.

PICTURE. Figure s07 puts the two extremes side by side: left, all-1s with flat Data and toggling Strobe; right, alternating bits with toggling Data and flat Strobe. Both yield the same tidy recovered clock underneath.

The one-picture summary

Figure s08 compresses the whole journey: the bit stream on top; Data and Strobe below it obeying the toggle rule (green = Strobe fired, blue = Data fired, exactly one per slot); the recovered clock as their XOR; and the blue sampling arrows reading the original bits back out — over a cable where a crossed-out clock wire reminds you none was needed.

Recall Feynman retelling — say it back in plain words

Two chips share two metal wires. One wire, Data, just holds each bit's value — high for 1, low for 0. The problem: if you send the same bit twice in a row, Data doesn't move, and the receiver loses count of where slots start. Old buses fixed this with a third clock wire, but in space that wire drifts out of step (skew) and the whole thing corrupts.

SpaceWire's fix: a second wire, Strobe, with one rule — move whenever Data doesn't. Now, in every single bit slot, exactly one of the two wires moves. The receiver doesn't need a clock at all: it just notices "one of the two wires just moved → new bit → read Data now." Mathematically "one of the two moved" is Data XOR Strobe, which flips once per slot — that flipping is the clock, built for free from the signal itself. Because the clock now lives on the same wires as the data, nothing can drift apart. Even the worst input — the same bit forever — is handled perfectly: Strobe simply ticks every slot. That's the entire idea.

Recall Quick self-check

Why does a separate clock wire fail in space? ::: The clock and data are independently routed, so temperature/radiation make them drift apart (skew) until the clock ticks into the wrong data slot. What does the Strobe wire do? ::: It toggles exactly when Data does not, guaranteeing exactly one edge per bit period across the two wires. How does the receiver recover the clock? ::: By XOR-ing Data and Strobe — since exactly one flips per slot, the XOR flips once per slot, giving one tick per bit; it samples Data on each tick. Is the bit value Data XOR Strobe? ::: No — the bit value is just the Data line; the XOR rebuilds the clock, not the data.

Related: LVDS Signaling (the physical wires carrying Data and Strobe), Cosmic Ray Effects on Electronics (why skew and single-bit glitches matter), Serial vs Parallel Communication (why two wires beat a wide parallel bus here).