Worked examples — GPIO — input - output, pull-up - pull-down, interrupt on pin change

5.5.2 · D3 · Coding › Embedded Systems & Real-Time Software › GPIO — input - output, pull-up - pull-down, interrupt on pin

Kuch bhi aur karne se pehle, teen plain-word reminders taaki koi bhi symbol bina explain ke use na ho:

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Scenario matrix

Har GPIO exercise inhi cells mein se kisi ek mein aata hai. Neeche ke examples us cell ke saath labelled hain jo woh cover karte hain, isliye milake woh sab ko hit karte hain.

Cell	Axis	The case	Example
A	Logic level	Pull-up + open switch → reads HIGH	Ex 1
B	Logic level	Pull-up + pressed switch → reads LOW (active-LOW)	Ex 1
C	Logic level	Pull-down + pressed-to-$V_{DD}$ → reads HIGH (active-HIGH)	Ex 2
D	Degenerate	Koi pull nahi → floating → undefined read	Ex 3
E	Sizing	$R$ choose karo taaki wasted current cap ho (normal range)	Ex 4
F	Limiting	$R\to$ small (few $\Omega$) → huge current, wasted power	Ex 4
G	Limiting	$R\to$ large (M$\Omega$) → noise wins → flaky	Ex 4
H	Fight/divider	Strong driver LOW vs pull-up → kaun jeeta hai? (voltage divider)	Ex 5
I	Timing	Bounce → spurious interrupts count karo; debounce window	Ex 6
J	Word problem	Real device: current budget over many pins	Ex 7
K	Exam twist	Pin OUTPUT set karo phir read karo → written value milti hai, button nahi	Ex 8

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Example 1 — Cells A & B: pull-up + active-LOW button

Neeche ki figure wohi circuit do baar draw karti hai — open left par, pressed right par. $V_{DD}$ (upar lavender rail) se neeche butter-yellow resistor $R$ ke through black "pin" dot tak, phir button tak wire trace karo. Dekho neeche ka coloured badge mint HIGH se coral LOW mein flip hota hai.

1. Open button, current trace karo. Left circuit mein pin se ek hi path hai upar $R$ ke through $V_{DD}$ tak; button ka lever utha hua hai (open), toh kuch bhi $GND$ se connect nahi hai. Sense-buffer (upar define kiya) essentially zero current draw karta hai. Yeh step kyun? Ohm's law kehta hai $R$ ke paas drop hone wali voltage $I\times R$ hai. Agar $I\approx 0$, toh $I\times R\approx 0$, isliye resistor ke paas koi voltage nahi khoti.
2. Level conclude karo. $R$ ke paas koi drop nahi hone par, pin $V_{DD}=3.3\text{ V}$ par baith jaati hai → HIGH = 1. Left badge mint hai. (Cell A)
3. Pressed button, current trace karo. Right circuit mein button (coral bar) pin ko seedha $GND$ se short karta hai (near-zero-ohm path). Pin $0\text{ V}$ par pin ho jaati hai. Yeh step kyun? Ek hard ground connection weak pull-up ko completely dominate karta hai — Ex 5 mein divider argument dekho.
4. Level conclude karo. Pin $0\text{ V}$ par → LOW = 0. Right badge coral hai. (Cell B)

Toh pressed 0 read karta hai — iska matlab yahi hai "active-LOW". Press ke dauran kya hota hai uske liye dekho Switch Debouncing.

Recall Check yourself

Pull-up + button-to-GND ke saath, OPEN state kya read karta hai? ::: HIGH (1) Wohi wiring mein, PRESSED kya read karta hai? ::: LOW (0), yaani active-LOW

Verify: open → $V_{\text{pin}}=V_{DD}-IR=3.3-0\cdot R=3.3\text{ V}$ (HIGH). Pressed → $0\text{ V}$ (LOW). ✓

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Example 2 — Cell C: pull-down + active-HIGH button

1. Open button. Ek hi path hai neeche $R$ ke through $GND$ tak. Sense-buffer ~0 draw karta hai, isliye $R$ ke paas koi drop nahi → pin $0\text{ V}$ par baith jaati hai → LOW = 0. Yeh step kyun? Wohi "no current ⇒ no voltage lost" logic jaise Ex 1 mein, lekin ab resistor hume ground ki taraf tie karta hai supply ki taraf nahi.
2. Pressed button. Button pin ko $V_{DD}$ se short karta hai → pin $3.3\text{ V}$ par → HIGH = 1. (Cell C) Yeh step kyun? $V_{DD}$ se seedha low-resistance connection weak pull-down ko overwhelm karta hai — wohi "hard connection weak pull ko jeet laata hai" idea jaise Ex 1 ka pressed case, bas upar ki taraf point karta hua neeche ki taraf nahi. Hume yeh half explicitly dikhana hai taaki reader dekhe ki pressed genuinely HIGH hai, sirf symmetry se assume nahi kiya gaya.

Yeh wiring active-HIGH hai (pressed = 1). Yeh zyaada naturally padhti hai lekin kam use hoti hai kyunki zyaadatar MCUs pull-ups bundle karte hain aur grounding electrically cleaner hai (Ex 1 ki wajah).

Verify: open → $0\text{ V}$ (LOW); pressed → $3.3\text{ V}$ (HIGH). Levels exactly Ex 1 ke versus swapped hain. ✓

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Example 3 — Cell D: floating (degenerate) input

Example se pehle, ek naya idea jo humhe chahiye:

Figure floating pin ki voltage ko time ke saath plot karta hai (lavender wiggle). Coral dashed line sense-buffer ka decision threshold hai $V_{DD}/2$ par; har coral dot wahan mark karta hai jahan wandering voltage cross karti hai aur read "reads 1" (mint zone, upar) aur "reads 0" (neeche) ke beech flip hoti hai.

1. Pin ko model karo. Ek undriven input woh tiny capacitor $C$ hai (kuch pF, upar define kiya) jo ek super-high-impedance sense-buffer se attached hai. Koi bhi resistor isse kahin bhi nahi tie karta. Yeh step kyun? Koi defined path nahi hone par, Ohm's law ke paas koi fixed $V$ nahi hai jo hume de sake — aur node capacitance $C$ charge hold karne ke saath, wahan jo bhi voltage land kare woh simply stick karti hai. Node electrically "orphaned" hai.
2. Phir voltage kya set karta hai? Stray coupling: nearby switching wires, tumhare haath ki capacitance, 50/60 Hz mains hum. Yeh $C$ par tiny charges push karte hain, aur $V=Q/C$ se voltage wander karti hai $0$ aur $V_{DD}$ ke beech kahin bhi (lavender curve).
3. Read result. Jab bhi wandering voltage buffer ke threshold ko cross kare (≈ $V_{DD}/2$, coral line), logic value flip ho jaati hai. Isliye read undefined / random hai — kabhi 0, kabhi 1. (Cell D)

Yeh #1 beginner bug hai ("button pressed reads karta hai jab main touch nahi karta"). Ilaaj hai koi bhi pull resistor, internal ya external.

Recall Degenerate case

Ek floating input read karta hai ::: na ek stable 0 na 1 — yeh undefined hai aur noise pick up karta hai.

Verify (conceptual): koi pull nahi matlab deterministic $V_{\text{pin}}$ nahi; result ek single value nahi hai, isliye uspar branch karne wala koi bhi code ek bug hai. (Kuch bhi numeric check karne ko nahi — point yeh hai ki koi number exist nahi karta.)

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Example 4 — Cells E, F, G: $R$ sizing karna (normal + dono limits)

1. Current set up karo (Cell E). Jab pressed, current flow karti hai $V_{DD}\to R\to GND$. Ohm's law se $I=\frac{V_{DD}}{R}$. Yeh step kyun? Pressed state mein yeh ek hi current path hai; ise cap karna wasted power ko cap karta hai.
2. $R$ solve karo. Hume chahiye $I\le 100\mu \text{A}$, isliye $R\ge \frac{V_{DD}}{I}=\frac{3.3}{100\times 10^{-6}}=33000\Omega =33\text{k}\Omega .$ 33 k$\Omega$–47 k$\Omega$ choose karo. (Cell E) Yeh step kyun? Hume $V_{DD}$ aur current budget $I$ pata hai, lekin unknown hai $R$. Ohm's law $I=V_{DD}/R$ mein $R$ neeche hai, isliye hum ise algebraically flip karte hain — dono sides ko $R$ se multiply karo, $I$ se divide karo — taaki $R=V_{DD}/I$ mile, woh quantity isolate karo jo hum actually choose kar sakte hain. Aur kyunki bada $R$ chota $I$ deta hai, current par "$\le$" $R$ par "$\ge$" ban jaata hai.
3. Limit F — $R=220\Omega$ (too small). $I=\frac{3.3}{220}=0.015\text{ A}=15\text{ mA}.$ Yeh tumhare budget ka 150× hai — button held down 15 mA ground par hamesha ke liye dump karta hai. Battery ke liye bura. (Cell F)
4. Limit G — $R=1\text{ M}\Omega$ (too big). $I=\frac{3.3}{1\times 10^6}=3.3\mu \text{A}.$ Barely koi waste — lekin itna weak ki pico-amp noise currents pin ko shift kar dete hain: "override" feeble hai, isliye read flaky ho jaata hai. (Cell G)

Verify: (a) $3.3/33000=1\times 10^{-4}=100\mu \text{A}$ ✓. (b) $3.3/220=0.015=15\text{ mA}$ ✓. (c) $3.3/10^6=3.3\times 10^{-6}=3.3\mu \text{A}$ ✓.

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Example 5 — Cell H: fight (voltage divider)

Figure dono resistors stack karta hai: butter-yellow $R_{\text{pull}}=33\text{k}\Omega$ upar $V_{DD}$ se, mint $R_{\text{driver}}=5\Omega$ neeche $GND$ tak, coral "pin (tap)" dot dono ke beech squeeze hua. Coral current arrow $I$ single current ko top-to-bottom dikhata hai.

1. Ise voltage divider ki tarah dekho. Current chalti hai $V_{DD}\to R_{\text{pull}}\to$ (pin) $\to R_{\text{driver}}\to GND$. Do resistors series mein $3.3\text{ V}$ ke paas; pin dono ke beech tap hai. Yeh step kyun? Dono paths simultaneously conduct karte hain, isliye pin exactly $V_{DD}$ ya $0$ nahi ho sakti — yeh divider point hai. Divider formula batata hai kahan.
2. Divider apply karo. Tap voltage supply ka bottom resistor over total ke barabar hai: $V_{\text{pin}}=V_{DD}\cdot \frac{R_{\text{driver}}}{R_{\text{driver}}+R_{\text{pull}}}=3.3\cdot \frac{5}{5+33000}.$ Yeh form kyun? Voltage resistance ke proportion mein split hoti hai; bottom leg ka share ground ke upar pin ki voltage hai.
3. Calculate karo. $V_{\text{pin}}=3.3\cdot \frac{5}{33005}\approx 3.3\cdot 1.515\times 10^{-4}\approx 5.0\times 10^{-4}\text{ V}=0.5\text{ mV}.$ Yeh step kyun? Humhe actual number chahiye, sirf formula nahi, kyunki poora sawaal hai "kya yeh $0$ ke paas hai ya $3.3$ ke paas?" Sirf fraction evaluate karne se (tiny bottom resistor over huge total ⇒ tiny fraction) hum dekhte hain ki pin microscopically ground ke upar land karti hai.
4. Conclude karo. $0.5\text{ mV}\approx 0\text{ V}$ → pin LOW reads karti hai. Strong (5 Ω) driver weak (33 kΩ) pull-up ke against overwhelmingly jeetta hai. (Cell H) Yeh step kyun? Ek logic input "LOW" ya "HIGH" decide karta hai ek threshold se compare karke (3.3 V parts ke liye, ≈ $0.99\text{ V}$ se kuch bhi LOW hai guaranteed). Kyunki $0.5\text{ mV}$ us threshold se ~2000× neeche hai, zero ambiguity hai — yahi wajah hai ki weak pulls safe hote hain: ek real driver hamesha unhe crush karta hai.

Verify: $3.3\cdot 5/33005=4.999\times 10^{-4}\text{ V}=0.4999\text{ mV}$, safely below any LOW threshold (~$0.99\text{ V}$ for 3.3 V logic). ✓

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Example 6 — Cell I: bounce aur debounce window

Figure bouncing pin voltage (lavender) LOW drop hoti dikhata hai; har coral down-triangle ek raw falling edge mark karta hai, $t=0$ par butter-outlined triangle woh ek accepted press hai, aur mint band woh 20 ms lockout hai jo baaki sab edges ko swallow karta hai.

1. Raw edges count karo. Paanch listed edges → 5 ISR calls bina debounce ke. Har spurious call pressed=true re-run karti hai — app sochta hai button 5 baar hit hua. (Cell I) Yeh step kyun? Hardware har electrical transition par fire karta hai; woh "real press" aur "contact chatter" mein fark nahi kar sakta.
2. 20 ms lockout apply karo. $t=0$ par edge accept karo; 20 ms window $[0,20)$ start karo. Edges at 1.5, 3, 4.5, 7 sab andar hain → ignored. Agla accept $t\ge 20$ chahiye; koi nahi hai. Yeh step kyun? Saara bounce kuch ms ke andar hota hai; ek 20 ms window poora burst comfortably swallow karta hai jabki ek insaan ko instant feel karta hai.
3. Conclude karo. Debounce ke saath: 1 accepted press. Sahi! ✓

RC-filter aur state-machine variants ke liye dekho Switch Debouncing, aur ISR ko short rakhne ke liye dekho Interrupts & ISR Design taaki woh pehle edge kabhi miss na kare.

Verify: raw count $=5$; edges inside $[0,20)$ ms $=\{1.5,3,4.5,7\}$ (4 suppressed), accepted $=1$. ✓

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Example 7 — Cell J: real-world current budget (word problem)

1. Per-button current. Pressed = pin button ke through grounded, isliye $I_1=\frac{V_{DD}}{R}=\frac{3.3}{10000}=3.3\times 10^{-4}\text{ A}=0.33\text{ mA}$. Yeh step kyun? Har pull-up apna independent $V_{DD}\to R\to GND$ path hai jab uska button neeche ho.
2. Total. Aath identical paths parallel mein add up hote hain: $I_{\text{tot}}=8\times 0.33\text{ mA}=2.64\text{ mA}$. (Cell J) Yeh step kyun? Parallel current sources sum hote hain; woh koi resistor share nahi karte.
3. Is leak se battery life. Capacity $÷$ current: $\frac{2000\text{ mAh}}{2.64\text{ mA}}\approx 757.6\text{ h}\approx 31.6$ din. Yeh step kyun? mAh $÷$ mA hours mein cancel ho jaata hai — ek direct units check ki humne yeh sahi set up kiya.

Toh even ek "wasteful" all-pressed case ~2.6 mA hai — usually fine, lekin coin cell par tum $R$ ko 47 k$\Omega$ tak bump karoge taaki ~5× cut ho.

Verify: $I_1=3.3/10000=3.3\times 10^{-4}\text{ A}$ ✓; $I_{\text{tot}}=8\times 3.3\times 10^{-4}=2.64\times 10^{-3}\text{ A}=2.64\text{ mA}$ ✓; life $=2000/2.64=757.6\text{ h}$ ✓.

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Example 8 — Cell K: exam twist (output pin read karna)

1. Push-pull output yaad karo. OUTPUT-HIGH ke roop mein, top transistor ON hai, pin ko $V_{DD}$ se sirf kuch ohms ke through hard-connect karta hai. Dekho Push-Pull vs Open-Drain Outputs. Yeh step kyun? Ek output pin actively drive kar raha hai, sun nahi raha — isliye ek input ki tarah nahi, yeh ek passive sense-buffer nahi hai jo koi level bataye jaane ka wait kar raha ho.
2. Button pressed = fight, lekin driver jeetta hai. Button ka path GND tak kuch resistance $R_{\text{btn}}$ hai (say $\sim 100\Omega$) versus driver ka $\sim 5\Omega$. Yeh exactly Ex 5 jaisa voltage divider hai, lekin ab strong driver upar baith hua hai ($V_{DD}$ tak) aur button ka bada resistance neeche hai: $V_{\text{pin}}=V_{DD}\cdot \frac{R_{\text{btn}}}{R_{\text{btn}}+R_{\text{driver}}}=3.3\cdot \frac{100}{100+5}=3.3\cdot \frac{100}{105}\approx 3.14\text{ V}.$ Yeh step kyun? $3.14\text{ V}$ HIGH threshold se kaafi upar hai (~$2.31\text{ V}$ for 3.3 V logic), isliye agar tum wire sense bhi kar sako, phir bhi yeh 1 reads karta hai, woh 0 nahi jo tum press se umeed karte. Strong driver ek mere $100\Omega$ button ke against neeche khinchne se mana kar deta hai.
3. Deeper read-path point. Kai MCUs par, ek push-pull output read karna output register se seedha written value return karta hai, bilkul physical sense nahi — toh read(pin2) 1 return karta hai button se regardless. Dono mechanisms wohi galat answer dete hain: press invisible hai. (Cell K)
4. Fix. Pin ko sense karne se pehle INPUT_PULLUP mein set karo. Phir idle = HIGH, pressed = LOW (Ex 1). Bonus wajah: as configured, pressing bhi button ke through ek strong driver seedha GND tak short karta hai — ek fault current jo pin ko damage kar sakta hai.

Verify: divider $3.3\cdot 100/105=3.143\text{ V}$ (HIGH, above ~$2.31\text{ V}$ threshold) ✓ — press kabhi 0 nahi dikhta.

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Recall Which cells did we cover?

A–K, sabhi gyarah — levels (A,B,C), degenerate float (D), sizing + dono limits (E,F,G), divider fight (H), timing/bounce (I), word-problem current budget (J), aur output-read exam trap (K). ::: ✓ har cell mein kam se kam ek worked example hai.

Related deep dives: Polling vs Interrupt-Driven I/O · volatile & Memory-Mapped Registers · Interrupts & ISR Design.