GPIO — input - output, pull-up - pull-down, interrupt on pin change: Exercises

Two symbols recur, so let us pin them down once in plain words:

Definition The two quantities we compute all page

$V_{D D}$ = the supply voltage — the "full HIGH" level the chip runs on, measured in volts (V). Think of it as water pressure at the top of a tank.
$I$ = electric current — how much charge flows per second through a wire, measured in amperes (A). $1 mA = 1 0^{- 3} A$ , $1 μ A = 1 0^{- 6} A$ . Think of it as litres of water per second.
$R$ = resistance — how hard a component fights the current, in ohms ( $Ω$ ); $1 k Ω = 1000 Ω$ . Think: a narrow pipe.

They are tied by Ohm's law, the one equation this whole page leans on: $V = I \cdot R ⟺ I = \frac{V}{R} ⟺ R = \frac{V}{I}$ WHY this and not something fancier? Because a pull resistor is just a resistor, and the only question we ever ask is "given two of {voltage across it, current through it, its resistance}, find the third." That is exactly what Ohm's law answers.

Figure — GPIO — input - output, pull-up - pull-down, interrupt on pin change

Look at the figure above: it is the reference circuit for almost every problem — an internal pull-up resistor $R$ from the pin to $V_{D D}$ , a button between the pin and $GN D$ , and the CPU's sense buffer "listening" at the pin. The red element is whatever each problem asks about.

Level 1 — Recognition

L1.1 A pin is configured so that when nothing is connected or pressed, the CPU reads logic 1 (HIGH). Which resistor is enabled — pull-up or pull-down?

Recall Solution

A pull-up. By definition a pull-up ties the pin to $V_{D D}$ through a weak resistor, so the idle (undriven) read is HIGH = logic 1. A pull-down would tie it to $GN D$ and idle LOW = logic 0.

L1.2 A button is wired active-LOW. The CPU reads the pin as 0. Is the button pressed or released?

Recall Solution

Pressed. "Active-LOW" means the active (pressed) state produces LOW = 0. Released → pull-up → HIGH = 1. So 0 ⇒ pressed.

L1.3 Name the three registers you touch on almost every MCU to use one GPIO pin, and say what each controls.

Recall Solution

Direction register (DDRx / MODER / TRIS) — sets input vs output.
Output-data register (PORTx / ODR) — the HIGH/LOW you drive when output.
Input-data register (PINx / IDR) — the level you read when input.

Level 2 — Application

L2.1 $V_{D D} = 3.3 V$ . An internal pull-up of $R = 47 k Ω$ is used. When the button is pressed (pin shorted to GND through the button), how much current flows through the pull-up? Give your answer in $μ A$ .

Recall Solution

When pressed the pin sits at $\approx 0 V$ , so the entire $V_{D D}$ is dropped across $R$ . WHY the whole $V_{D D}$ ? Because the button short holds one end of $R$ at GND and $V_{D D}$ holds the other end, so the voltage across the resistor is $V_{D D} - 0 = V_{D D}$ . $I = \frac{V _{D D}}{R} = \frac{3.3}{47 000} = 7.02 \times 1 0^{- 5} A \approx 70.2 μ A$

L2.2 You must keep the pressed-state current at or below $50 μ A$ with $V_{D D} = 5 V$ . What is the minimum pull-up resistance?

Recall Solution

Smaller $R$ ⇒ bigger current, so a maximum current gives a minimum $R$ . Rearrange Ohm's law for $R$ : $R \geq \frac{V _{D D}}{I} = \frac{5}{50 \times 1 0 ^{- 6}} = 100000 Ω = 100 k Ω$ So use ≥ 100 kΩ. Anything smaller wastes more than the allowed $50 μ A$ while the button is held.

L2.3 A real output transistor drives the pin LOW with an on-resistance $R_{d r i v er} = 8 Ω$ , fighting a pull-up $R_{p u l l} = 33 k Ω$ to $V_{D D} = 3.3 V$ . What voltage does the pin actually settle at? Is that a valid LOW?

Recall Solution

The pull-up and the driver form a voltage divider: $V_{D D}$ pushes down through $R_{p u l l}$ , the driver pulls to GND through $R_{d r i v er}$ . WHY a divider? Because both resistors are in series from $V_{D D}$ to GND with the pin as the middle tap, and the pin voltage is the fraction of $V_{D D}$ that lands across the bottom resistor $R_{d r i v er}$ : $V_{p in} = V_{D D} \cdot \frac{R _{d r i v er}}{R _{d r i v er} + R _{p u l l}} = 3.3 \cdot \frac{8}{8 + 33 000} = 8.0 \times 1 0^{- 4} V \approx 0.8 mV$ That is essentially $0 V$ — a rock-solid LOW. This is the whole reason "weak" pull-ups work: the strong driver overwhelms them.

Level 3 — Analysis

L3.1 An input pin has no pull resistor enabled and nothing is driving it. A colleague says "it just reads 0, that's fine." Explain in circuit terms why the read is actually unreliable, and what physically stores the stray voltage.

Recall Solution

The input is a high-impedance sense buffer — it draws almost no current, so it cannot pull the pin anywhere. The pin plus nearby traces form a tiny capacitor (a charge store). With nothing to fix its voltage, that capacitor picks up charge from mains hum, nearby switching wires, even your finger's field. So the read is whatever noise last charged the node — sometimes 0, sometimes 1, randomly. A weak pull resistor supplies a defined path to $V_{D D}$ or $GN D$ , so the capacitor always relaxes to a known level.

L3.2 For an active-LOW button you must choose a trigger for the interrupt. Rising, falling, or level? Justify why the other two are wrong.

Recall Solution

Falling edge. Active-LOW idles HIGH and goes LOW on press, i.e. a $1 \to 0$ transition = falling edge. That fires exactly once per press — the event we care about.

Rising edge would fire on release ( $0 \to 1$ ), not press — wrong moment.
Level (LOW) would keep re-firing continuously while the button is held, flooding the CPU. An edge is a one-shot event; a level is a sustained state.

L3.3 A pressed button generates a burst of ~14 edge interrupts in 6 ms even though you pressed once. Name the phenomenon, explain the physical cause, and give a software fix with a concrete time window.

Recall Solution

This is switch bounce. The metal contacts physically slam, spring apart, and re-touch several times over ~1–10 ms before settling, so each micro-contact is a real edge to the hardware. Fix = debounce: on the first edge, record a timestamp and ignore further edges until, say, 20 ms has elapsed (20 ms comfortably exceeds the ~6 ms bounce window). Alternatively filter the line with an RC network so fast wiggles never reach the pin. See Switch Debouncing.

Level 4 — Synthesis

L4.1 Design the pull-up for a keypad line. Constraints: $V_{D D} = 3.3 V$ ; pressed-state current must stay below $60 μ A$ ; the pull-up must be strong enough that leakage of up to $1 μ A$ into the pin cannot lift the LOW above $0.4 V$ . Give a valid resistance range.

Recall Solution

Upper bound (current cap). Bigger $R$ = less current, so the current limit sets a minimum $R$ : $R_{min} = \frac{V _{D D}}{I _{ma x}} = \frac{3.3}{60 \times 1 0 ^{- 6}} = 55000 Ω = 55 k Ω$ Lower... wait, the leakage sets a maximum $R$ . When the button pulls LOW, a leakage current $I_{l e ak} = 1 μ A$ flows through the pull-up too and lifts the pin. The pin voltage above GND is $V = I_{l e ak} \cdot R$ (Ohm's law across the pull-up, with $I_{l e ak}$ as the current). To keep $V \leq 0.4 V$ : $R_{ma x} = \frac{V}{I _{l e ak}} = \frac{0.4}{1 \times 1 0 ^{- 6}} = 400000 Ω = 400 k Ω$ So any $R$ in $55 k Ω \leq R \leq 400 k Ω$ works. A classic 100 kΩ sits safely in that band. (Related sizing logic: Pull-up Resistor Sizing & Ohm's Law.)

L4.2 Write a correct interrupt-driven skeleton (pseudo-C) for an active-LOW button on pin 3 that (a) uses the internal pull-up, (b) triggers once per press, (c) is debounced by 20 ms, and (d) is safe under -O2 optimization. State why each safety choice is there.

Recall Solution

volatile bool pressed = false;     // shared ISR<->main => volatile
volatile uint32_t last_edge_ms = 0;
 
void ISR_PIN3() {                  // hardware jumps here on falling edge
    uint32_t now = millis();
    if (now - last_edge_ms >= 20)  // debounce: ignore bounce burst
        pressed = true;
    last_edge_ms = now;
    clear_interrupt_flag(PIN3);    // else it re-fires immediately
}
 
int main() {
    pin_mode(3, INPUT_PULLUP);         // idle = HIGH (active-LOW)
    attach_interrupt(3, FALLING, ISR_PIN3);  // once per press
    while (1) {
        if (pressed) { handle_press(); pressed = false; }
    }
}

volatile on pressed and last_edge_ms: the compiler otherwise caches them in a register and the main loop never sees the ISR's writes — the exact bug that "works in debug, breaks at -O2."
Falling trigger: one ISR per press for active-LOW.
clear_interrupt_flag: the hardware latches a flag; if not cleared the ISR re-enters forever.
20 ms debounce window: swallows the bounce burst. Tiny ISR body: set a flag, do heavy work in main. See Interrupts & ISR Design and volatile & Memory-Mapped Registers.

Level 5 — Mastery

L5.1 A student sets pin 5 as a push-pull output driving 1, then in the same loop reads pin 5 hoping to sense a button wired to it. The read is always 1 regardless of the button. Diagnose fully: why the read is stuck, what the button current does, and the correct fix.

Recall Solution

A push-pull output actively drives the line: driving 1 turns on the top transistor, hard-connecting the pin to $V_{D D}$ through a few ohms. Reading the input register then just returns the level the output is forcing — 1 — not the button. Worse: if the button is pressed it shorts $V_{D D} \to$ button $\to GN D$ through that low-ohm transistor, a near-short that can wastefully sink large current or damage the pin. Fix: to sense a button you must set the pin direction = INPUT with a pull-up (INPUT_PULLUP), which disconnects the drive transistors and lets the world set the level. Output and input are physically different paths (see Push-Pull vs Open-Drain Outputs and Polling vs Interrupt-Driven I/O).

L5.2 Two devices on a shared line, one open-drain output with an external pull-up $R = 4.7 k Ω$ to $V_{D D} = 3.3 V$ . When a device pulls the line LOW ( $V_{p in} \approx 0$ ), compute the bus current. Then explain why open-drain, not push-pull, is mandatory on such a shared bus.

Recall Solution

When one device holds the line LOW, the full $V_{D D}$ drops across the pull-up: $I = \frac{V _{D D}}{R} = \frac{3.3}{4700} = 7.02 \times 1 0^{- 4} A \approx 0.70 mA$ Why open-drain is mandatory: every device can only pull LOW or release (go Hi-Z); the shared pull-up provides the HIGH. So if two devices act at once, worst case both pull LOW — harmless. With push-pull, one device driving HIGH and another driving LOW would connect $V_{D D}$ directly to GND through two low-ohm transistors: a destructive short. Open-drain makes the wired-AND bus safe. This is exactly how Open-drain & I²C Bus works.

Recall One-line recap of every formula used

Current through a pull-up when pressed: $I = V_{D D} / R$ .
Minimum $R$ from a current cap: $R_{min} = V_{D D} / I_{ma x}$ .
Maximum $R$ from a leakage/voltage limit: $R_{ma x} = V / I_{l e ak}$ .
LOW voltage under a real driver (divider): $V_{p in} = V_{D D} R_{d r i v er} / (R_{d r i v er} + R_{p u l l})$ .

Return to the parent GPIO note.