5.5.2 · D5 · HinglishEmbedded Systems & Real-Time Software

Question bankGPIO — input - output, pull-up - pull-down, interrupt on pin change

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5.5.2 · D5 · Coding › Embedded Systems & Real-Time Software › GPIO — input - output, pull-up - pull-down, interrupt on pin


True or false — justify

A floating input pin will always read LOW because nothing pulls it up.
False. "Floating" ka matlab undefined hai, LOW nahi — pin ek tiny antenna ki tarah behave karta hai jo noise pick karta hai, toh yeh HIGH aur LOW ka random, jittery mix read karta hai.
A push-pull output can also be read to sense an external button on the same pin.
False. Ek push-pull output line ko low-resistance transistor ke through actively drive kar raha hota hai, toh input register read karna sirf wahi value return karta hai jo aapne write ki thi, button ki state nahi. Sensing se pehle direction INPUT par switch karna padega.
An internal pull-up is "weak," which means it is too feeble to ever pull the pin fully HIGH.
False. "Weak" iska bada resistance (≈10–50 kΩ, woh range jo MCU makers build karte hain) refer karta hai, failure ko nahi — open input ke saath yeh pin ko tak easily le aata hai kyunki sense buffer almost no current draw karta hai. Weak ka sirf matlab hai ki ek real driver ise override kar sakta hai, aur yahi toh poora point hai.
Active-LOW means the button is wired incorrectly and should be fixed.
False. Active-LOW ("pressed = 0") wiring preferred robust wiring hai: pull-up idle-HIGH, button pin ko ground karta hai. Yeh intentional hai kyunki MCUs (microcontroller units) mein built-in pull-ups hote hain aur grounding electrically clean hoti hai.
A level-triggered interrupt is the right choice for a momentary push-button.
False. Level trigger continuously re-fire karta hai jab tak pin active state mein hai, toh button hold karne par ISR (interrupt-service-routine) calls ki baarish ho jaati hai. Button ek event hai, toh aapko edge triggering chahiye (ek call per transition). Neeche ka timing figure dono ko contrast karta hai. Dekho Interrupts & ISR Design.
If code works in an unoptimized debug build, the ISR-shared flag doesn't really need volatile.
False. Debug builds coincidentally RAM re-read karte hain, bug ko chhupate hue. Optimization ke saath compiler flag ko CPU register mein forever cache kar sakta hai, toh main loop ko ISR ka change kabhi nahi dikhta; volatile har baar fresh memory read force karta hai taaki update hamesha dikh sake. Yeh build se regardless mandatory hai.
Open-drain outputs can drive a line both HIGH and LOW like push-pull.
False. Open-drain mein sirf pull-to-GND transistor hota hai: yeh LOW pull kar sakta hai ya Hi-Z (high-impedance — kisi bhi rail se connected nahi) ho sakta hai, kabhi actively HIGH drive nahi kar sakta. Ek external pull-up HIGH supply karta hai — exactly yahi Open-drain & I²C Bus shared buses kaam karte hain.
Polling can safely replace interrupts for catching very short input pulses.
False. Poll pin ko sirf un instants par dekhta hai jab loop read karta hai; loop period se chhota pulse reads ke beech slip through kar jaata hai. Hardware interrupts event ko ek flag mein latch karte hain taaki woh miss na ho. Dekho Polling vs Interrupt-Driven I/O.
Writing to the input data register lets you set the pin's level.
False. Input register ek sense path hai; isme likhna kuch useful nahi karta. Output levels output data register (PORTx/ODR) ke through set hote hain, aur read aur write paths physically alag hote hain.
A larger pull-up resistor is always better because it wastes less current.
False. Ek tradeoff hai: bahut bada (e.g. 1 MΩ) pull ko itna weak bana deta hai ki noise aur leakage ise override kar sakti hai, flaky reads dete hue. Aap chahte hain ki idle level par firmly aahe ke liye kafi chhota ho, current limit karne ke liye kafi bada — dekho Pull-up Resistor Sizing & Ohm's Law.

Spot the error

pin_mode(2, OUTPUT); if (read_pin(2)) handle_button(); — what's wrong?
Pin OUTPUT configure kiya gaya hai jabki aap button sense karne ki koshish kar rahe hain. Ise read karne par jo last drive kiya wahi return hoga, external signal nahi. Sensing se pehle pull ke saath INPUT par set karo.
An ISR does for(i=0;i<100000;i++) crunch(); then returns — why is this a bug?
ISR heavy kaam kar raha hai jabki doosre interrupts block ho sakte hain, missed events aur timing jitter cause karte hue. ISR ko tiny rakho: ek flag set karo aur crunching main loop mein karo.
The ISR sets a flag but never calls clear_interrupt_flag(PIN2) — what happens?
Hardware event flag set reh jaata hai, toh jaise hi ISR return karti hai woh turant phir fire ho jaati hai, CPU ko endless ISR loop mein trap karti hai. Flag ISR ke andar clear karna zaroori hai.
bool pressed = false; is shared between an ISR and main() but not marked volatile — the error?
volatile ke bina compiler pressed ko CPU register mein cache kar sakta hai aur kabhi RAM re-read nahi karta, toh main() ka loop ISR ka update kabhi nahi dekhta. Fresh memory read har baar force karne ke liye ise volatile mark karo.
A designer uses a 220 Ω pull-up on a 3.3 V active-LOW button — why is this poor?
Jab button held hota hai, current mA continuously heat ke roop mein waste hoti hai. Yeh sirf idle level define karne ke liye bahut zyada hai; 33–47 kΩ resistor wohi kaam microamps mein karta hai.
A shared I²C-style line uses push-pull outputs on every device — what breaks?
Agar ek device HIGH drive kare aur doosra LOW simultaneously, toh woh ladte hain aur drivers ko damage kar sakte hain ("bus contention"). Shared buses ko open-drain chahiye taaki devices sirf LOW pull kar sakein, ek common pull-up HIGH define karne deta hai. Dekho Push-Pull vs Open-Drain Outputs.
One button press triggers the ISR 12 times — what was forgotten?
Switch bounce: mechanical contacts ~1–10 ms tak chatter karte hain, edges ki ek burst produce karte hue. Neeche ka bounce figure edges ki spray dikhata hai. Debouncing add karo — ~20 ms ke liye aur edges ignore karo ya RC network se filter karo. Dekho Switch Debouncing.

Why questions

Why do most MCUs give input and output their own separate data registers?
Kyunki read path (ek sense buffer) aur write path (driver transistors) pin ke andar physically alag circuits hain. Inhe alag karna "jo main drive karna chahta hoon" aur "jo duniya ne yahan rakha hai" ko collide hone se rokta hai.
Why does a strong output driver reliably override a weak pull-up on the same node?
Kyunki dono resistances se GND tak ek voltage divider banate hain, aur chhota resistor almost saari voltage apne paas rakhta hai. Neeche ka divider figure aur derivation dekho — few-ohm driver ke against 33 kΩ pull-up ke saath pin essentially 0 V par land karti hai.
Show the divider that proves the driver wins.
Jab driver LOW pull karta hai, pin (upar tak) aur (neeche GND tak) ke beech hoti hai dono ke through ek current flow karte hue; pin voltage woh hai jo tiny bottom resistor ke across bachi hai, toh . , , V plug karne par mV milta hai — GND se practically indistinguishable, toh driver overwhelmingly jeet jaata hai.
Why trigger a button ISR on the falling edge rather than the rising edge (for active-LOW)?
Active-LOW wiring mein pin idle pe HIGH hoti hai aur press pe LOW ho jaati hai, yaani press ek transition hai. Falling edge press ka woh moment hai, toh aapko exactly ek ISR call per press milti hai.
Why is an interrupt described as "the pin tapping the CPU on the shoulder"?
CPU "kya yeh change hua?" hazaaron baar second mein poochhe (polling, wasteful aur short pulses miss karne wala) ki jagah, hardware pin watch karta hai aur event hone ke instant par CPU ko ISR mein yank kar deta hai — toh CPU meanwhile doosra kaam kar sakta hai. Dekho Polling vs Interrupt-Driven I/O.
Why must an ISR be kept as short as possible?
ISR ke andar rehte hue doosre interrupts mask ho sakte hain, toh lamba ISR doosre events ko delay ya drop kar deta hai aur timing jitter add karta hai. Minimum karo (flag set karo / enqueue karo) aur real kaam main loop ko do.
Why does an input pin need a pull resistor even though it "only listens"?
Floating wire sunna noise return karta hai, kyunki high-impedance sense buffer ke paas kuch nahi hota jo voltage steady rakhe. Pull-up ya pull-down idle level define karta hai taaki un-driven pin ek known, stable value read kare.

The three pictures behind this bank


Edge cases

What state are most MCU pins in the instant after power-up, and why does it matter?
Reset par zyaatar pins default hoti hain input with pulls disabled par — yaani floating, high-impedance. Jab tak aapka setup code pull enable nahi karta ya inhe drive nahi karta, koi bhi input read noise karta hai aur inse wired koi bhi device undefined level dekhta hai, toh aapko pins jaldi configure karna hoga unpar trust ya act karne se pehle.
If the pull-up and an external device both try to define the pin, who wins?
Strong device (few-ohm driver) divider argument se jeet jaata hai; kΩ pull-up sirf tab matter karta hai jab kuch aur pin drive nahi karta. "Sirf jab floating ho" wala role exactly uska kaam hai.
What does an open-drain output read as when it's in Hi-Z with no external pull-up?
Yeh float karta hai — undefined, noisy — kyunki Hi-Z ka matlab hai yeh kisi bhi rail ko drive nahi karta, bilkul kisi bhi undriven input ki tarah. Open-drain ko released line ko defined HIGH dene ke liye ek external pull-up chahiye.
What happens if a pin-change interrupt is set to "change" (both edges) for a bouncing switch?
Har bounce edge — dono directions mein — ISR fire karta hai, toh ek single press dozens of calls generate kar sakta hai. Both-edge triggering bounce problem ko better nahi, balki worse banata hai; pehle debounce karo.
If a fast pulse arrives while the CPU is busy but interrupts are enabled, is it lost?
Nahi — hardware event ko interrupt flag mein latch karta hai, toh ISR jaise hi CPU free hota hai run karta hai. Yeh latching polling par key advantage hai, jo sirf loop instants par sample karta hai.
What does a pull-down input read when the button (wired to ) is not pressed?
LOW (logic 0), kyunki pull-down gently pin ko GND se tie karta hai jab kuch drive nahi karta. Press karne par yeh se connect ho jaata hai HIGH ke liye — yeh usual active-LOW wiring ka active-HIGH mirror hai.
If you enable an internal pull-up and wire an external pull-down, what level does the pin idle at?
(internal pull-up ke through) aur GND (external pull-down ke through) ke beech ek divider idle voltage set karta hai; agar dono similar size ke hain toh pin mid-supply ke paas idle ho sakti hai — ek undefined logic region. Pull-up ko pull-down se mat larao.

Recall Ek-line self-test

Upar har answer cover karo aur bank dobara run karo. Agar aap har ek par verdict (sirf guess nahi) justify kar sakte hain, toh aapne trap map kar li hai.