Virtual memory — concept, page table, virtual-to-physical translation

4.1.14 · Coding › Computer Architecture (Deep)

Virtual memory kyun exist karta hai?

Teen concrete problems jo yeh solve karta hai:

Isolation / protection — Process A ko Process B ki memory read ya todne ki permission nahi honi chahiye. Agar dono raw physical addresses use karein, toh address 0x4000 dono ke liye same byte hoga → chaos.
Relocation / fragmentation — Ek program ko parwah nahi honi chahiye ki woh RAM mein kahan land karta hai. Hum chahte hain ki use kisi bhi free chunks mein load karein, chahe non-contiguous kyun na ho.
Over-commitment — Hum chahte hain ki jo programs physically exist se zyada memory maangein, unhe bhi chalayein — unused parts ko disk (swap) par park karke.

Genius trick yeh hai: page ke andar ka offset virtual aur physical space mein identical hota hai, kyunki pages aur frames same size ke hain aur aligned hain. Sirf page number part ko translate karna hota hai.

Derivation ki offset preserve hota hai. Maano virtual address $VA = VPN \cdot 2^{p} + off$ hai jahan $0 \leq off < 2^{p}$ . Translation page ko replace karta hai: $PA = PFN \cdot 2^{p} + off$ . Wahi off appear hota hai, isliye hum offset bits ko kabhi translate nahi karte. ∎

Figure — Virtual memory — concept, page table, virtual-to-physical translation

Forecast-then-Verify

Verify, step by step:

Page size $= 4 KiB = 2^{12}$ → offset = 12 bits. Kyun? Ek 4096-byte page ke andar har byte ko address karne ke liye exactly 12 bits chahiye.
VPN bits $= 32 - 12 = 20$ . Kyun? Baaki high bits page identify karte hain.
Entries $= 2^{20} = 1, 048, 576$ . Kyun? Har possible virtual page ke liye ek entry.
Agar har entry 4 bytes ki hai → table size $= 2^{20} \times 4 = 4 MiB$ per process. Yeh kyun matter karta hai: yahi bada cost hai isliye real systems multi-level page tables use karte hain (sirf actually use hone wale pages ke liye sub-tables allocate karo).

Worked translation examples

Common mistakes (Steel-manned)

Active recall

Recall Quick self-test (answers cover karo)

Q: Address ka kaun sa part translate NAHI hota? A: offset.
Q: Page size $2^{p}$ → kitne offset bits? A: $p$ bits.
Q: Page fault kab trigger hota hai? A: jab accessed page ka valid bit 0 ho.
Q: Per-process page tables kyun? A: isolation — same VA har process ke liye alag physical frames par map hota hai.
Q: Final PA formula? A: $PA = PFN \cdot 2^{p} + offset$ .

Recall Feynman: ek 12-saal ke bacche ko explain karo

Ek bade hotel ki imagine karo. Har guest ko bola jaata hai "tumhara room Room 1 hai" — sab sochte hain ki woh Room 1 mein hain. Lekin hotel ke paas ek secret notebook (page table) hai jo kehti hai "Guest Alice ka Room 1 actually physical Room 305 hai; Bob ka Room 1 actually Room 712 hai." Jab Alice apne "Room 1, shelf 7" par kuch maangti hai, toh front desk notebook dekh ke use real room 305 bhej deta hai, aur shelf 7 abhi bhi shelf 7 hai us room ke andar (offset nahi badlta). Agar real cheez basement storage (disk) mein rakh di gayi thi, toh desk pehle use fetch karne daudta hai (page fault) aur notebook update karta hai. Is tarah sabko lagta hai ki woh poora hotel khud ka hai, koi kisi ke room mein nahi jaata, aur hotel physically se zyada "rooms" hold kar sakta hai extras ko storage mein rakh ke.

The 80/20 — kya truly internalize karna hai

Offset bits $= lo g_{2} (page size)$ ; yeh kabhi translate nahi hota.
$PA = PFN \cdot pagesize + offset$ .
Page table per process hoti hai (isolation ke liye) aur RAM mein rehti hai (→ TLB cache).
Invalid entry → page fault → OS disk se load karta hai → retry.

Connections

Paging vs Segmentation
TLB — Translation Lookaside Buffer
Multi-level Page Tables
Cache Memory and Locality
Page Replacement Algorithms (LRU, FIFO, Clock)
Context Switching and CR3 / Page-Table Base Register
Memory Hierarchy

Virtual memory har process ko illusion deta hai

ek bade, private, contiguous address space ka jo 0 se shuru hota hai.

Virtual address space ki unit ko kehte hain

page.

Physical RAM ki unit jisme yeh map hoti hai use kehte hain

frame (page frame).

Page table map karta hai

virtual page number (VPN) → physical frame number (PFN).

Woh hardware jo har access par translation perform karta hai woh hai

MMU (Memory Management Unit).

Page size 2^p ke liye, offset bits ki sankhya hai

Virtual address ka woh part jo translate NAHI hota woh hai

offset.

Final physical address formula

PA = PFN * pagesize + offset.

V-bit VA aur 2^p pages ke liye single-level page table mein entries ki sankhya

2^(V-p).

Page fault tab trigger hota hai jab

accessed page ka valid bit 0 ho (RAM mein nahi hai).

Page fault service karne ke baad OS faulting instruction ke saath kya karta hai

use restart karta hai taaki translation ab succeed kare.

Page tables per-process kyun hote hain

isolation ke liye — same virtual address har process ke liye alag physical frames par map hota hai.

Big-page trade-off: fewer entries lekin

zyada internal fragmentation aur bade fault transfers.

Woh cache jo VPN→PFN lookups speed up karta hai woh hai

TLB (Translation Lookaside Buffer).

32-bit VA, 4 KiB pages → offset bits / VPN bits / #entries

12 / 20 / 2^20.