Fetch-decode-execute cycle — step by step
1.1.11· Coding › How Computers Work
YEH HAI KYA?
YEH EXIST KYUN KARNA CHAHIYE? Kyunki ek program sirf ek list of instructions hai jo memory mein baitha hua hai. CPU ke paas koi magic nahi hai — use ek mechanical procedure chahiye taaki (a) woh jaane ki kaun si instruction next hai, (b) use itna paas laaye ki act kar sake, aur (c) act karne se pehle use samjhe. Cycle wahi procedure hai.
Key parts (taaki steps samajh mein aayein)
- PC — Program Counter: next instruction ka address hold karta hai. WHY: CPU ko apni jagah yaad rakhni chahiye list mein, jaise recipe ki line par ungali rakhna.
- MAR — Memory Address Register: woh address hold karta hai jahan se hum read karna chahte hain / jahan write karna chahte hain.
- MDR — Memory Data Register: woh data/instruction hold karta hai jo abhi memory se fetch kiya gaya hai.
- CIR — Current Instruction Register: woh instruction hold karta hai jo abhi decode/execute ho rahi hai.
- ALU — Arithmetic Logic Unit: maths (+ − ×) aur logic (AND, compare) karta hai.
- CU — Control Unit: woh boss jo decode karta hai aur signals bhejta hai.

HOW yeh kaam karta hai — step by step derive kiya gaya
Chaliye cycle ko scratch se build karte hain, har move par poochhte hue: "CPU ko abhi kya nahi pata, aur usse kya chahiye?"
Step 1 — FETCH
Har line kyun?
MAR ← PC— Kyun? Memory sirf ek address par respond karti hai, aur addresses ko address bus par MAR se travel karna padta hai. Isliye hum "where next" ko MAR mein copy karte hain.MDR ← [MAR]— Kyun? Instruction physically RAM mein rehti hai. Hum address bahar bhejte hain, RAM data bus par reply karta hai, aur woh reply MDR mein land hoti hai.CIR ← MDR— Kyun? MDR ek temporary "loading dock" hai; jis instruction par hum kaam karenge woh CIR mein rehni chahiye taaki next fetch usse overwrite na kare.PC ← PC + 1— Abhi kyun? Hum jaldi increment karte hain, execution se pehle, taaki PC already next instruction ki taraf point kar raha ho. (Agar execute ke dauran jump hota hai, toh woh simply PC ko overwrite kar deta hai.)
Step 2 — DECODE
Control unit CIR mein instruction ko do parts mein split karta hai:
- Opcode = kya karna hai (jaise ADD, LOAD, STORE, JUMP).
- Operand = kisko karna hai (ek address, ek register, ya ek value).
Split kyun karte hain? CPU ko ek binary blob ko concrete control signals mein baadalna hai — "yeh gate kholo, woh bus route karo." Jab tak opcode pata na ho, woh act nahi kar sakta.
Step 3 — EXECUTE
CU control signals fire karta hai; ALU aur registers kaam karte hain. Examples:
ADD→ ALU operand ko accumulator mein add karta hai.STORE→ ek value memory mein daalte hain.JUMP n→PC ← noverwrite karo (isi tarah loops/ifs kaam karte hain!).
Phir: wapas Fetch par. Forever (halt tak).
Worked examples
Common mistakes (steel-manned)
Recall Feynman: ek 12-saal ke bachche ko samjhao
Socho tum ek recipe follow kar rahe ho, lekin tum ek waqt mein sirf ek line dekh sakte ho. Teri ungali line par point kar rahi hai (woh PC hai). Tum line padhte ho (fetch), tum samajhte ho ki yeh tumhe kya karne bol raha hai — "2 anday daalo" (decode), aur phir tum actually karte ho usse (execute). Phir teri ungali next line par slide karti hai aur tum sab dobara karte ho. Ek computer yeh billions of times per second karta hai — yeh sirf ek super fast cook hai jo ek waqt mein sirf ek tiny line padh sakta hai lekin kabhi thakta nahi!
Active recall
Instruction cycle ke teen stages kya hain, order mein?
Kaun sa register next instruction ka address hold karta hai?
Fetch mein PC execute run hone se pehle kyun increment hota hai?
Kaun sa register RAM se abhi padhe gaye data/instruction ko temporarily hold karta hai?
Kaun sa register abhi decode ho rahi instruction hold karta hai?
Decode ke dauran control unit instruction ko kaun se do parts mein split karta hai?
ALU ka full form kya hai aur yeh kya karta hai?
JUMP instruction loop kaise create karta hai?
Ek 3 GHz CPU ek second mein roughly kitne cycles run karta hai?
MAR se memory tak address kaun si bus le jaati hai?
Connections
- CPU architecture (Von Neumann) — kyun instructions aur data ek memory share karte hain.
- Registers and the ALU — woh storage jis par cycle rely karti hai.
- Buses — address, data, control — woh wires jo micro-steps use karte hain.
- Clock speed and performance — cycle rate GHz se kaise map hoti hai.
- Machine code and opcodes — woh kya hai jo decode hota hai.
- Pipelining — faster jaane ke liye cycles overlap karna.