Intuition The ONE core idea
A computer normally keeps its "brain" (the processor) and its "notebook" (the memory) in separate places, and wastes most of its time and energy just carrying numbers between them . Processing-in-Memory says: stop carrying — do a little of the thinking right where the numbers already live.
Before you can enjoy Processing-in-memory (PIM) , you must own every word and symbol it throws at you. This page builds each one from nothing — plain words first, then a picture, then why the topic needs it . Read top to bottom; each block leans only on the ones above it.
Definition Processor (CPU) and Memory (DRAM)
The processor is the part that does arithmetic — add, multiply, compare. The memory (usually DRAM , dynamic random-access memory) is a huge grid of tiny cells, each holding one bit (a 0 or a 1). Think of the processor as a fast chef and memory as a giant warehouse of labelled ingredient boxes.
Picture two boxes on a table joined by a long wire.
Figure s01 — the processor (left, yellow) and memory (right, blue) drawn as two separate boxes joined by one thin "bus" wire; the pink double-arrow marks the slow traffic path every number must cross.
Intuition Why we even name these two things
Every symbol in the topic is about the distance and traffic between these two boxes. If you don't see them as separate with a wire between them , nothing else will land. That wire is the villain of the whole story.
The bus is the wire (really a bundle of wires) that carries data between memory and the processor. Every number the processor wants must ride this bus.
B — how wide the pipe is
Bandwidth is how many bytes per second the bus can carry. We write it B , measured in gigabytes per second (GB/s). A byte is 8 bits — enough to store one small number or one character.
Picture a water pipe: bandwidth is the pipe's thickness , not the water's speed. A fat pipe (B large) moves lots of data; a thin pipe throttles everything.
B is the star symbol
The parent note says data-hungry jobs are "bandwidth-bound." That single word means: the job's speed is set entirely by B , the pipe's thickness — not by how clever the chef is. PIM's whole trick is to sneak around this thin pipe.
N — bytes moved
N is the total number of bytes a job must move over the bus. If you read three numbers and write one for every element, N counts all four for every element.
C — compute operations
C is the total number of arithmetic operations the job performs (adds, multiplies...). One a + b is one op.
R — compute rate
R is how many operations per second the processor can do. Like B is the speed of moving , R is the speed of thinking .
Figure s02 — two stacked time-bars. Top (data-hungry job): the blue move-term N / B dominates while the pink think-term C / R is a sliver. Bottom (compute-heavy job): the pink C / R dominates. The picture shows which term wins is what matters.
Intuition Why we split time into two pieces
We want to know which piece dominates . If N / B (moving) is huge and C / R (thinking) is tiny, then speeding up the chef (R ) is pointless — you must fix the wire. That single realization is the entire motivation for PIM and the Memory Wall .
Definition Arithmetic intensity
I
I = C / N = operations per byte moved . It answers: "for every byte I drag over the bus, how much useful math do I get out of it?"
⚠️ Symbol note: in this section the letter I means arithmetic intensity (a pure count, ops per byte). Later, in the electricity section, we will retire this meaning and let I stand for electrical current . Same letter, two totally different worlds — we will flag the switch when it happens.
Intuition The picture: work-per-trip
Imagine each byte is a heavy trip to the warehouse. High I = you do lots of chopping per trip (efficient). Low I = you run all the way there just to chop one carrot (wasteful — a great PIM candidate ).
Low I → bandwidth-bound → the wire limits you → PIM helps a lot.
High I → compute-bound → the chef limits you → PIM helps little.
This single ratio is the "80/20 test" the parent note runs first. It also feeds the Roofline Model , which plots performance against I .
A DRAM chip is split into many independent sub-grids called banks . Each bank can be read at the same time as the others — like many warehouse aisles being searched in parallel. (More in DRAM Organization (banks, rows) .)
k , B bank , B in t
k = the number of banks working in parallel.
B bank = the bandwidth inside one bank — how fast that aisle moves data internally.
B in t = the total internal bandwidth when all banks work together:
B in t = k ⋅ B bank
Figure s03 — k banks (blue, left) each feed a wide internal flow (yellow arrows) into a merge point, which then squeezes onto a single thin pink "bus B " arrow. Visually: huge internal bandwidth B in t funnels down through the narrow external bottleneck B .
Intuition Why internal bandwidth is secretly enormous
Inside a bank, thousands of bits are pulled from a row at once . That internal flow B in t can dwarf the external bus B — because the thin bus is a shipping bottleneck, not a storage limit. PIM computes on that wide internal flood before it ever has to squeeze onto the bus. The speedup is roughly B in t / B = k ⋅ ( B bank / B ) .
E o p and E m o v e
E o p = energy to do one arithmetic operation , measured in joules per operation (J/op) .
E m o v e = energy to fetch the operands from DRAM across the bus. When quoted per bit it is joules per bit (J/bit) ; per operand-fetch it is joules per access (J/access) . Concretely, a single arithmetic op costs on the order of a few picojoules (1 pJ = 1 0 − 12 J ), while a DRAM fetch costs hundreds to a thousand times that.
Empirically E m o v e ≈ 100 – 1000 × E o p (unitless ratio, so the J's cancel). Moving a bit is far more expensive than computing on it — like the tiring part of cooking being the running to the warehouse, not the chopping.
Intuition Why the topic obsesses over movement
Both time (T = N / B + C / R ) and energy (E ≈ N ⋅ E m o v e + C ⋅ E o p ) are dominated by the move term for data-hungry jobs. So the payoff isn't a faster chef — it's fewer trips. PIM attacks exactly the term that dominates.
The parent's crossbar example borrows two laws of electricity. Both must be earned here.
I = G V
⚠️ Symbol switch: from here on, I no longer means arithmetic intensity — it means electrical current (flow of charge). We are now inside electricity, not workload accounting.
Voltage V is electrical "push." Conductance G says how easily current flows (a fat easy wire has high G ). Current I is the flow that results. Ohm's law: current = conductance × push, I = G V .
Why this tool? In a crossbar we store a weight as a conductance G and feed an input as a voltage V . Then a single physical cell computes the product G × V for free — the multiplication is the physics.
Definition The summation symbol
∑
Before we use it: ∑ j x j is shorthand for "add up all the x j as the index j runs over every value ." For example ∑ j = 1 3 x j = x 1 + x 2 + x 3 . It is just a compact way to write a long "+ + +" chain — nothing more.
Definition Kirchhoff's current law (KCL)
Currents entering a shared wire add up . If three cells dump I 1 , I 2 , I 3 onto one row wire, the wire carries I 1 + I 2 + I 3 .
Why this tool? Multiply gave us each G ij V j ; KCL gives us the sum , which — now that we know the ∑ shorthand — we write ∑ j G ij V j = G i 1 V 1 + G i 2 V 2 + … , and a sum-of-products is a dot product. Multiplication (Ohm) + addition (Kirchhoff) = a whole matrix–vector multiply in one analog instant. See Memristor / ReRAM Crossbars .
Figure s04 — a crossbar grid. Blue vertical wires carry input voltages V 1 , V 2 , V 3 ; yellow dots at the crosspoints are the stored conductances G ij ; each horizontal wire sums the cell currents by Kirchhoff's law and emits a row current I i (pink arrows) — one dot product per row, the whole matrix–vector multiply in one analog step.
Definition Dot product & matrix–vector multiply
A dot product of two lists multiplies matching entries and sums: a 1 b 1 + a 2 b 2 + … . A matrix–vector multiply does one dot product per row of a grid of numbers. This is the core operation of Neural Network Accelerators — which is why PIM loves neural nets.
Definition Amdahl's Law (the sanity brake)
If only a fraction p of a job can be sped up (by a factor S on that part), the whole job's speedup is capped:
S t o t a l = ( 1 − p ) + S p 1
Here p is the fraction of the work that PIM accelerates, S is how much faster that fraction runs, and ( 1 − p ) is the stubborn part that stays at normal speed. Even if S → ∞ , the best you can ever reach is S t o t a l = 1/ ( 1 − p ) — the un-sped part sets a hard ceiling.
So even a huge B in t can't erase the leftover compute term C / R . Always sanity-check PIM speedups against Amdahl's Law ; they never reach infinity.
Processor and Memory as two boxes
Time = N over B plus C over R
Arithmetic intensity I = C over N
Banks k and internal bandwidth B_int
Dot product and matrix vector multiply
Amdahl Law S total capped
Test yourself — cover the right side and answer before revealing.
What are the two "boxes" PIM cares about and what joins them? The processor (does math) and the memory (stores bits), joined by the bus (the slow wire).
What does bandwidth B measure, and what everyday picture fits it? Bytes per second the bus can carry — the thickness of a pipe, not the water's speed.
Write the classic time equation and say what each term means. T v N = N / B + C / R : move-time (bytes ÷ bandwidth) plus think-time (ops ÷ rate).
Define arithmetic intensity and what low vs high I implies. I = C / N ops per byte; low I = bandwidth-bound (great for PIM), high I = compute-bound (PIM helps little).
What is a bank, and why does B in t = k ⋅ B bank beat B ? A bank is an independent DRAM sub-grid; many run in parallel, so total internal bandwidth vastly exceeds the single external bus.
What units carry E o p and E m o v e , and how do they compare? E o p in joules per op (order pJ), E m o v e in joules per bit/access; E m o v e ≈ 100 – 1000 × E o p , so movement dominates energy.
State Ohm's law and Kirchhoff's current law in one line each. Ohm: I = G V (current = conductance × voltage). KCL: currents on a shared wire add up.
What does the symbol ∑ j x j mean? Add up all the x j as index j runs over its values — a compact "+ + +" chain.
How do those two laws combine into a matrix–vector multiply? Ohm gives each product G ij V j ; KCL sums them per row into a dot product, so I = G V in one analog step.
Write Amdahl's Law and its ceiling. S t o t a l = 1/ (( 1 − p ) + p / S ) ; as S → ∞ it saturates at 1/ ( 1 − p ) , so the un-sped fraction caps the whole speedup.