6.5.5 · D1Advanced & Emerging Architectures

Foundations — Processing-in-memory (PIM)

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Before you can enjoy Processing-in-memory (PIM), you must own every word and symbol it throws at you. This page builds each one from nothing — plain words first, then a picture, then why the topic needs it. Read top to bottom; each block leans only on the ones above it.


1. Where numbers live and where they are used

Picture two boxes on a table joined by a long wire.

Figure — Processing-in-memory (PIM)

Figure s01 — the processor (left, yellow) and memory (right, blue) drawn as two separate boxes joined by one thin "bus" wire; the pink double-arrow marks the slow traffic path every number must cross.


2. The bus and its bandwidth


3. Counting the work: , , and rate

Figure — Processing-in-memory (PIM)

Figure s02 — two stacked time-bars. Top (data-hungry job): the blue move-term dominates while the pink think-term is a sliver. Bottom (compute-heavy job): the pink dominates. The picture shows which term wins is what matters.


4. Arithmetic intensity

  • Low bandwidth-bound → the wire limits you → PIM helps a lot.
  • High compute-bound → the chef limits you → PIM helps little.

This single ratio is the "80/20 test" the parent note runs first. It also feeds the Roofline Model, which plots performance against .


5. Banks and internal parallelism: , ,

Figure — Processing-in-memory (PIM)

Figure s03 — banks (blue, left) each feed a wide internal flow (yellow arrows) into a merge point, which then squeezes onto a single thin pink "bus " arrow. Visually: huge internal bandwidth funnels down through the narrow external bottleneck .


6. Energy: vs


7. The physics tools for "using-memory" (PUM)

The parent's crossbar example borrows two laws of electricity. Both must be earned here.

Figure — Processing-in-memory (PIM)

Figure s04 — a crossbar grid. Blue vertical wires carry input voltages ; yellow dots at the crosspoints are the stored conductances ; each horizontal wire sums the cell currents by Kirchhoff's law and emits a row current (pink arrows) — one dot product per row, the whole matrix–vector multiply in one analog step.


8. Amdahl's Law — the reality check


Prerequisite map

Processor and Memory as two boxes

Bus and bandwidth B

Time = N over B plus C over R

Arithmetic intensity I = C over N

Banks k and internal bandwidth B_int

Energy E_move vs E_op

Ohms law I = G V

Dot product and matrix vector multiply

Kirchhoffs current law

Summation symbol sum

Processing in Memory

Amdahl Law S total capped


Equipment checklist

Test yourself — cover the right side and answer before revealing.

What are the two "boxes" PIM cares about and what joins them?
The processor (does math) and the memory (stores bits), joined by the bus (the slow wire).
What does bandwidth measure, and what everyday picture fits it?
Bytes per second the bus can carry — the thickness of a pipe, not the water's speed.
Write the classic time equation and say what each term means.
: move-time (bytes ÷ bandwidth) plus think-time (ops ÷ rate).
Define arithmetic intensity and what low vs high implies.
ops per byte; low = bandwidth-bound (great for PIM), high = compute-bound (PIM helps little).
What is a bank, and why does beat ?
A bank is an independent DRAM sub-grid; many run in parallel, so total internal bandwidth vastly exceeds the single external bus.
What units carry and , and how do they compare?
in joules per op (order pJ), in joules per bit/access; , so movement dominates energy.
State Ohm's law and Kirchhoff's current law in one line each.
Ohm: (current = conductance × voltage). KCL: currents on a shared wire add up.
What does the symbol mean?
Add up all the as index runs over its values — a compact "+ + +" chain.
How do those two laws combine into a matrix–vector multiply?
Ohm gives each product ; KCL sums them per row into a dot product, so in one analog step.
Write Amdahl's Law and its ceiling.
; as it saturates at , so the un-sped fraction caps the whole speedup.