6.3.1 · D5Interconnects, Buses & SoC
Question bank — Bus topologies and arbitration
This is a question bank for the parent note Bus topologies and arbitration (6.3.1). Every item is a one-line reveal: read the prompt, say your answer out loud with a reason, then check. The goal is to catch the misconceptions this topic quietly plants — not to do arithmetic (that lives in the drill pages).
True or false — justify
A shared parallel bus lets two masters transfer data at the same time as long as they use different address ranges
False. On a shared bus all masters use the same physical wires, so only one transaction exists at any instant regardless of addresses — this is time-division multiplexing, not spatial separation.
A crossbar with masters and slaves can always run transfers at once
False. It can run at most transfers, and only if no two masters target the same slave — two masters wanting one slave still serialize at that slave's port.
Round-robin arbitration guarantees every master a bounded worst-case wait
True. After a master is skipped it waits for at most the other masters, so — starvation is impossible.
Fixed-priority arbitration gives the highest-priority master a bounded worst-case wait
True — but only for the highest one, which can win every cycle. The lowest-priority master has unbounded wait, which is the real trap.
TDM wastes bandwidth when a scheduled master has nothing to send
True. In pure TDM, a slot is reserved even if its owner is idle, so that slot goes unused — the price you pay for perfectly deterministic timing.
A point-to-point topology (like a switch fabric) removes arbitration entirely
False. Arbitration still happens, but it is distributed — each switch port arbitrates locally instead of one global arbiter deciding for a single shared wire.
Adding more devices to a crossbar keeps per-master bandwidth constant, so crossbars scale for free
False. Per-master bandwidth is preserved, but switch count grows as (quadratic), so die area and wiring cost explode — that, not bandwidth, is what limits crossbar size.
In a hierarchical/tree bus, two devices on the same local bus get full local bandwidth
True. Intra-bus traffic never touches a bridge, so it runs at ; only cross-bridge traffic is throttled to .
Round-robin is always more efficient than fixed priority
False. Under asymmetric load (one master busy, others idle) round-robin still polls the idle masters, wasting cycles, while fixed priority hands the bus straight to the active one.
Spot the error
"PCI is fast because it's a 32-bit parallel bus, so 10 devices each get the full 133 MB/s."
The error is ignoring sharing. The 133 MB/s is total, split across contending masters — with 10 devices under contention each sees roughly , dropping toward ~13 MB/s.
"A crossbar has no arbitration, that's the whole point of parallel paths."
Wrong — a crossbar needs per-slave arbitration. Parallel paths only help when masters hit different slaves; two masters targeting the same slave still fight for that one port.
"Fixed priority is fair because the most important task always wins."
The error conflates priority with fairness. Importance is not binary: a low-priority but latency-sensitive task (audio DMA) can miss deadlines while a high-priority CPU hogs the bus. Fairness needs bounded latency for all.
"TDM needs a fast arbiter because it decides the winner every cycle."
TDM does the opposite — the schedule is precomputed, so during a slot the grant is already known and no arbitration logic runs. That's why TDM is cheap and deterministic.
"Switching from shared PCI to PCIe made things faster mainly by raising the clock."
The bigger reason is topology: PCIe is point-to-point with dedicated lanes, so short impedance-matched traces enable GHz signaling and removed the electrical loading that capped shared-bus frequency.
"Round-robin worst-case wait is transactions for masters."
Off by one. A skipped master waits for the other masters, giving — not .
"Because a crossbar avoids a shared data bus, its cost grows linearly with the number of ports."
The cost is quadratic: switches. An 8×8 crossbar already needs 64 switches — this superlinear growth is exactly why large systems move to a Network-on-Chip.
Why questions
Why does adding devices to a shared bus lower its maximum clock frequency?
Each device adds capacitance to the shared wires, slowing signal rise/fall times; slower edges force a lower clock to keep signals valid, so heavier loading means lower .
Why does fixed priority cause starvation but round-robin does not?
Fixed priority always re-selects the top requester, so a busy high-priority master can lock out lower ones forever; round-robin advances the pointer after each grant, guaranteeing everyone a turn within slots.
Why is TDM preferred for hard real-time systems even though it wastes idle slots?
Because a master knows the exact time it will get the bus — bounded, jitter-free latency matters more than peak utilization when missing a deadline is a hard failure.
Why does a crossbar give "zero interference" between, say, a CPU reading DRAM and a GPU writing a display buffer?
They target different slaves, so the switch matrix routes each on an independent point-to-point path — there is no shared data wire for them to contend over.
Why do hierarchical buses place frequently-communicating devices on the same local bus?
To keep their traffic local — it stays at , avoids bridge latency, and doesn't congest the root bus that other subtrees depend on.
Why is arbitration overhead a real cost even when no collision happens?
The bus sits idle during arbitration cycles while the arbiter resolves who goes next; those cycles carry no data, so they subtract directly from usable bandwidth.
Why can cache-coherence traffic make a shared bus worse than its raw bandwidth suggests?
Coherence adds extra transactions (invalidations, snoops) that every master must observe on the shared wires, consuming the single shared pathway even when no useful data moves.
Edge cases
What happens in round-robin when the master whose turn it is has no request?
The arbiter skips it and advances the pointer to the next master — no bus cycle is wasted on data, though the check itself may cost a cycle under asymmetric load.
What is the worst-case latency for the highest-priority master under fixed priority?
Essentially one transaction — it can preempt everyone below it, so its wait is bounded by whatever transfer is already in progress (or an atomic/locked burst it cannot interrupt).
For a crossbar with master, how many concurrent transfers are possible and does the crossbar help?
Only transfer at a time, so the crossbar's parallelism gives no benefit — a single master can't exploit multiple simultaneous paths; you paid switches for a plain link.
In TDM, what does a master with zero assigned slots () experience?
It never gets bus access — its allocated bandwidth . This is a valid (if useless) configuration and shows TDM allocation must be checked to cover every active master.
If bridge bandwidth equals local bandwidth (), what does a hierarchical bus reduce to for cross-bus traffic?
Cross-bus transfers see , so the bridge stops being a bottleneck and inter-bus traffic behaves like intra-bus — the hierarchy only saves wiring, not bandwidth, in this case.
What is per-master bandwidth on a shared bus when only one master is active ()?
The full bus bandwidth — the penalty only appears under contention; a lone master is not slowed, which is why shared buses look fine until load rises.
In a crossbar, what happens when all masters simultaneously target the same slave?
They fully serialize at that slave's port — concurrency collapses to 1, so this worst case performs exactly like a shared bus despite the crossbar's hardware.
Recall Quick self-test
Which single property distinguishes a crossbar's cost from its bandwidth behaviour? ::: Bandwidth scales with (helpful), but switch count scales with (quadratic cost) — they grow at very different rates. Name the arbitration scheme that needs no runtime arbiter during a grant. ::: TDM — the schedule is precomputed, so the winner of each slot is already fixed.