6.3.1 · D1 · HinglishInterconnects, Buses & SoC

FoundationsBus topologies and arbitration

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6.3.1 · D1 · Hardware › Interconnects, Buses & SoC › Bus topologies and arbitration

Parent note padhne se pehle, aapko pata hona chahiye ki har ek chhota symbol aur word kya matlab rakhta hai aur kaisa dikhta hai. Yeh page unhe ek ek karke, bilkul shuru se build karta hai. Agar aapne kabhi "bus" nahi dekha, yahan se shuru karein aur upar se neeche padhein.


Sabse pehle ki pictures: master, slave, aur wire

Hum unhe ek naam aur neeche ek chhote number ke saath likhte hain, jaise ya . Woh chhota neeche ka number sirf unhe alag karne ke liye ek label hai — matlab "pehla master", bas itna hi. Math mein is chhote neeche ke number ko subscript kehte hain.

Figure — Bus topologies and arbitration

Is figure ko kaise padhein: left side par magenta box hai; right side par violet box hai. Orange arrow ko follow karein jo right jaata hai — woh master ka poochna hai ("address 42 read karo?"). Phir navy arrow ko follow karein jo wapas left aata hai — woh slave ka jawab dena hai ("yeh lo data"). Arrows kabhi bhi dono slave se shuru nahi hote: ek slave kabhi pehle nahi bolta. Yeh ek picture hi ek transaction ki definition hai — ek sawaal bahar, ek jawab wapas.

Topic ko yeh kyun chahiye: poora subject hai "bahut saare masters, kam roads, baari lo." Aap baari lene ki baat tab tak nahi kar sakte jab tak aapko pata na ho kaun pooch raha hai.


Wires khud: ek "bus" actually kya hoti hai

Figure dekho: teen rangin wire-bundles, har ek device usi same bundle par tap kar rahi hai. Woh "same wire par tap karna" hi is topic mein har ek problem ka source hai.

Figure — Bus topologies and arbitration

Counting symbols: , , ,

Parent note aap par letters phenk deta hai. Har ek sirf ek number ki jagah hai jo aap abhi fix nahi karna chahte.

Hum numbers ki jagah letters use karte hain taaki ek formula kisi bhi size ke system ke liye kaam kare. Jab aap dekhte hain, ise zor se padhein: "total road speed masters mein baant di" — har master ka fair share.


Math shorthand jo aapko padhni aani chahiye

Chaar chhote notation pieces baar baar aate hain. Unhe bolna seekho.

Topic ko yeh kyun chahiye (ek topology ka preview jo aap baad mein milenge): parent note mein ek wiring shape crossbar hai — ek switches ki grid socho jo kaafi masters ko kaafi slaves se ek saath baat karne deti hai, ek pair ke liye ek independent path (aap ise parent note mein poori tarah se padenge). masters aur slaves ke saath, ek crossbar zyada se zyada conversations ek saath chala sakta hai — aapke paas masters se zyada ya slaves se zyada simultaneous chats nahi ho sakte, isliye limit chhoti count hai.

Topic ko yeh kyun chahiye: worst-case waiting time = har ek transaction ko add karo jo aapke aage queue mein aata hai.

Figure — Bus topologies and arbitration

Topic ko yeh kyun chahiye: round-robin arbitration master ko baari deta hai — yeh aakhri master ke baad master 0 par wapas circle karta hai, hamesha fair.


Bandwidth-as-a-fraction

Ek fraction sirf "hissa over poora" hai. = "mere slots over saare slots" = pie mein mera hissa.


Do shabd jo poore subject ka naam hain


Yeh sab topic ko kaise feed karta hai

Device master and slave

Bus as shared wires

Address data control lines

Counting letters N M S B

Bandwidth as a fraction

Topology the wiring shape

min sum mod big-O

Arbitration the turn rule

Bus topologies and arbitration

Ise upar se neeche padhein: aapko topology se pehle devices aur wires chahiye; aapko arbitration formulas padhne se pehle counting letters aur math shorthand chahiye. Dono streams parent topic par milti hain.


Aage yeh kahan jaata hai

  • Control lines par request/grant handshake → Bus protocols and signals
  • Jab do masters usi same memory ko cache karein tab kya hota hai → Cache coherence
  • Ek master jo CPU ke bina data move karta hai → DMA
  • Shared bus ki modern packet-switched replacement → Network-on-Chip aur PCIe architecture
  • Woh slave jo main memory ki raksha karta hai → Memory controllers

Equipment checklist

Right side cover karo aur khud ko test karo. Agar koi bhi jawab aapko surprise kare, uska section upar phir se padhein.

Ek master aur ek slave mein kya fark hai?
Master ek transaction shuru karta hai (poochta hai); slave sirf tab jawab deta hai jab usse address kiya jaaye.
Ek classic bus ke teen wire-groups kya hain?
Address lines, data lines, control lines.
Ek shared bus par ek waqt mein sirf ek hi transaction kyun use kar sakta hai?
Do devices ek hi wire drive karti hain toh electrical collision hoti hai — wire ek waqt mein do values show nahi kar sakti.
Kya aur alag cheezein mean karte hain?
Nahi — dono ka matlab "masters ki sankhya" hai; arbitration formulas mein use hota hai, crossbar formulas mein.
ko shabdon mein padhein.
Total bus bandwidth masters mein barabar banti hai — har master ka fair share.
kya deta hai aur topic ise kyun use karta hai?
aur mein se chhota; ek crossbar utni simultaneous conversations nahi chala sakta jitne uske paas masters ya slaves hain.
Sum mein kya represent karta hai?
Woh time jo master ke transaction mein lagta hai (kitni der tak woh bus hold karta hai).
expand karo.
.
compute karo aur batao yeh kya model karta hai.
; round-robin baari aakhri master se wapas master 0 par wrap hoti hai.
Bandwidth formula mein ka kya matlab hai?
Repeating TDM schedule mein master ke paas time-slots ki sankhya.
Agar master ke paas 8 TDM slots mein se 2 hain, toh ise bandwidth ka kitna fraction milta hai?
.
Topology aur arbitration ko ek ek phrase mein define karo.
Topology = wiring ki shape; arbitration = woh rule jo competing masters mein se ek winner choose karta hai.
Recall Self-check: kya aap memory se 3 masters wali ek shared bus draw kar sakte ho?

Aapko teen master boxes draw karne chahiye jo sab ek address+data+control bundle par tap kar rahe hain, aur explain karna chahiye ki ek waqt mein sirf ek hi data wires drive kar sakta hai. Agar haan, toh aap parent note ke liye taiyaar hain.