6.1.2 · D1Parallelism & Multicore

Foundations — Instruction-level vs thread-level parallelism

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Before you can compare ILP and TLP, you need to know what every word and symbol on that page means — starting from nothing. This page builds each brick in order. Read top to bottom; nothing appears before it is explained.


1. What is an "instruction"?

Picture a to-do list where every line is a single, absolutely simple action — nothing bigger.

Figure — Instruction-level vs thread-level parallelism
Figure 1: A program drawn as a numbered stack of blue instruction boxes. Each box is one indivisible order (load a, add a+b -> s, ...). The yellow arrow points out that a single box = a single tiny order — this stack is the "list" that ILP overlaps.

Why the topic needs it: ILP is about overlapping these individual orders. If you don't picture the program as a list of separate instructions, "instruction-level" has nothing to hang on.


2. What is a "thread"?

Figure — Instruction-level vs thread-level parallelism
Figure 2: On the left, a single blue thread (one column of instruction boxes) — this is the arena where ILP operates. On the right, three separate coloured threads (blue, green, red) running side by side — this is the arena where TLP operates. Notice a thread is built out of instructions.

Why the topic needs it: running many threads at once is the whole second half of the parent note. We give the number of them a symbol () and its own hardware ("cores") in Section 6 — for now, just hold the picture of several independent to-do lists.


3. What is a "cycle" and "instructions per cycle"?

Picture a metronome. On each tick, work advances one small notch.

Figure — Instruction-level vs thread-level parallelism
Figure 3: Dashed white lines mark clock ticks. The top blue row finishes exactly one instruction per tick (). The bottom green row finishes three per tick (). The yellow caption says it all: bigger = more instructions overlapped per tick = more ILP.

Why the topic needs it: is the "how much ILP" knob. Bigger = more instructions overlapping = more ILP. It plugs directly into the speedup formula below.


4. What is "parallel" vs "serial"?

Figure — Instruction-level vs thread-level parallelism
Figure 4: Left (red) — a dependency chain: four boxes joined top-to-bottom by arrows, each step forced to wait for the one above, so they line up serially. Right (green) — four independent boxes sitting side by side with no arrows between them, free to run together. Chains block ILP; independent boxes enable it.

Why the topic needs it: dependencies are why ILP is limited. The fraction that has no dependencies is exactly the number below.


5. The fractions and

Both are fractions, so always and .


6. The symbol — number of cores


7. The speedup formula, symbol by symbol

Now every symbol is defined, so the parent's headline formula reads cleanly.

Applying it to ILP (using and ) and to TLP (using and ):

Read the denominator as "serial part left alone, plus parallel part shrunk by the speedup": stays full size, while is the parallel part divided among (or among ). This whole shape is Amdahls-Law — a prerequisite worth its own page.

Recall Why does the denominator have two terms?

Because total time = serial time + parallel time, and only the parallel term gets divided by how much parallelism you have. ::: The serial term can never be sped up — that is the ceiling on any speedup.


8. The third category the parent warns about


Prerequisite map

This diagram shows how each foundation feeds the next and finally into the topic. In words: Instruction is the root — it feeds Thread, Clock cycle, and Dependency. Clock cycle gives us IPC ; Dependency gives us the fraction ; Thread gives us both the core count and the fraction . The pair (, ) drives ILP speedup; the pair (, ) drives TLP speedup; and SIMD enters as a separate third strand. All three arrive at the ILP vs TLP topic.

Instruction

Thread

Clock cycle

IPC n

Core count N

Dependency

Parallelizable fraction f

Parallelizable fraction p

ILP speedup

TLP speedup

ILP vs TLP topic

SIMD data parallel


Equipment checklist

Cover the right side and test yourself:

An instruction is
one tiny order to the processor (add, load, jump).
A thread is
one independent stream of instructions — its own to-do list.
A clock cycle is
one tick of the processor; work advances each tick.
The symbol (IPC) means
instructions completed per cycle — the "how much ILP" knob, with .
The symbol means
number of cores / hardware threads running at once, with .
A dependency is
when one instruction needs another's result, forcing them to be serial.
is
the fraction of instructions that are independent (for ILP), .
is
the fraction of the program splittable across threads (for TLP), .
Speedup is defined as
old time divided by new time — how many times faster.
The ILP speedup formula is
.
The TLP speedup formula is
.
When the ILP speedup equals
(no independent work, no gain).
When the ILP speedup equals
(capped by machine width).
SIMD belongs to which category
data-level parallelism — neither ILP nor TLP.