5.4.13 · D1Memory Hierarchy & Caches

Foundations — Page tables and multi-level paging

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Before you can read the parent note Page Tables and Multi-Level Paging without tripping, you need to own every symbol it throws at you. This page builds each one from the ground up: plain words → the picture → why the topic needs it. Read top to bottom; each idea leans on the one above it.


1. A "bit" and a "power of two" — the alphabet of everything

Line up switches in a row and each switch can be flipped independently. So the number of distinct patterns you can make is ( times):

The picture: think of a car odometer, but each wheel has only two symbols () instead of ten. With 3 wheels you can show — that is distinct readings.

Figure — Page tables and multi-level paging

Why the topic needs it: every "size" in paging — how many pages, how big a page, how many table entries — is a power of two, because it is counted by some number of address bits.


2. Bytes and addresses — giving every locker a number

The picture: a hallway of identical mailboxes, each with a little number plate. The plate is the address; whatever letter is inside is the byte.

  • bytes = 4 GiB of addressable space.
  • ⇒ an astronomically larger space (this is why flat tables die).

Why the topic needs it: the whole job of paging is turning one address into another. tells you how big the "from" world is.


3. Virtual vs physical — the pretend number and the real number

The picture: two hallways side by side. The left (virtual) is what the program sees — clean, complete, all its own. The right (physical) is the real, shared, half-full building. Arrows cross from left boxes to scattered right boxes.

Figure — Page tables and multi-level paging

Why the topic needs it: without this split, two programs both wanting "locker 5" would clash. Virtual addresses let each program pretend it owns everything, while physical reality stays shared and safe. See Virtual Memory and Address Space Layout for the bigger story.


4. Pages and frames — cutting both hallways into equal blocks

The picture: take both hallways from figure s02 and draw thick dividers every boxes. Each virtual block (page) maps to one physical block (frame). Because the blocks are the same size, a virtual page can drop into any free frame — like same-size bricks fitting any same-size slot.

Why the topic needs it: fixed equal-size blocks kill external fragmentation and make the low bits of the address untouchable — the two pillars everything else stands on.


5. Splitting an address: page number | offset

Now cut a single address into two fields using the dividers from Section 4.

Why these two operations?

  • (integer divide, drop the remainder) answers "how many whole blocks of fit below this address?" — that is the block number.
  • (the remainder) answers "how far into the current block are we?" — that is the offset.

The picture: an odometer where a vertical line splits the wheels. Wheels left of the line = page number; wheels right = offset. Turning offset wheels never touches the page-number wheels until they roll over past .

Figure — Page tables and multi-level paging

Why the topic needs it: translation only ever rewrites the page number; the offset is copied verbatim. This split is the whole engine.


6. Bit operations: masking &, shifting << >>, and |

The formulas above use , , and that are cheaper than real division on a computer. Because is a power of two, the "divide" and "remainder" are pure bit surgery. (Full detail in Bit Manipulation and Masking.)

Why the topic needs it: the parent writes and everywhere. These are the same thing said two ways — powers of two make division into shifting.


7. The lookup table, the entry, and its flags

The picture: a spreadsheet. Row number = VPN (you don't store it — it's just where the row sits). The cell contents = PFN + flags. Index in, value out.

Why the topic needs it: "the array position is the key, the entry is the value" is one of the parent's steel-manned mistakes. If you don't see the table as indexed by VPN, none of the multi-level walk makes sense.


8. A "level" and a base register — why one table becomes a tree

A single flat table with rows is mostly empty for a real program. So we index in stages: chop the VPN itself into slices, and use each slice to step down one level of a tree of small tables.

The picture: a table of contents (top table) points to chapters (inner tables), which point to pages (frames). You only print the chapters someone actually reads. Each level costs one real RAM read — that is where the TLB later earns its keep, just as a plain cache rescues slow memory.


How it all feeds the topic

bits and 2 to the n

byte and address width V

virtual vs physical

page size P and log base 2

split address into page number and offset

shift and mask and OR

page table indexed by VPN gives PFN plus flags

multi level tree of tables and base register

Page tables and multi-level paging


Equipment checklist

What does count?
The number of distinct patterns (things you can name) with bits.
What does answer?
How many bits you need to name any one of things.
What is an address, in one sentence?
The number written on a byte-sized locker in memory.
How big is the space of a -bit address?
bytes.
Virtual vs physical address?
Virtual is the pretend number the program uses; physical is the real RAM location; hardware translates one to the other.
Why can a page go into any free frame?
Pages and frames are the same fixed size , so any page fits any frame slot.
Given page size , which bits are the offset?
The low bits.
How do you extract the offset with bit ops?
AND the address with a mask of ones: .
What does do and why use it?
Shifts left by bits = multiply by ; used to put the frame number back above the offset.
What indexes a page table, and what does a PTE hold?
The VPN is the index (position); the PTE holds the PFN plus flag bits.
Name three PTE flags.
valid, read/write, user/supervisor (also dirty, accessed).
What is a "level" in multi-level paging?
One stage that uses one slice of VPN bits to pick a row pointing to the next table.
What does CR3 (the base register) hold?
The physical address of the top-level page table.

Once every line above feels obvious, go read the parent note — or the Hinglish version.