5.4.5 · D1Memory Hierarchy & Caches

Foundations — Replacement policies (LRU, FIFO, random)

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Before you can compare LRU, FIFO, and Random on the parent topic, you must own every piece of vocabulary they lean on. We build each one in order, picture first.


1. Memory vs. Cache — the shelf and the library

Figure — Replacement policies (LRU, FIFO, random)

Look at the figure: the big teal box on the right is main memory — huge, slow to reach. The small orange box on the left is the cache — only a few slots, but the CPU can grab from it almost instantly.

Why the topic needs this: replacement only ever happens because the cache is small. If the cache were as big as memory, nothing would ever need evicting, and this whole topic would vanish. Smallness is the source of the entire problem.


2. Block — the unit that moves

We label blocks with letters in every example. When we write "load ", we mean: copy the block named from main memory into a cache slot.

Why the topic needs this: the "item" you evict is always a whole block. The letters in every access sequence (like ) are block names. If you did not know that a block is the atomic unit, the sequences would be meaningless. See 5.4.01-Cache-organizationand-addressing for how memory addresses map to blocks.


3. Hit, Miss, and Eviction — the three events

Figure — Replacement policies (LRU, FIFO, random)

The picture shows the decision as a fork: "Is the block here?" → yes = hit (green path), no = miss (orange path) → "Is there a free slot?" → no = evict someone first.

Why the topic needs this: the replacement policy runs only at the eviction step. Hits never trigger it. Misses trigger it only when the cache is already full. Every policy is precisely a rule for that one red box.


4. Set and Way — where a block is allowed to live

An n-way associative set has slots (ways numbered ). A 2-way set has 2 slots; a 4-way set has 4.

Figure — Replacement policies (LRU, FIFO, random)

In the figure the cache is drawn as rows (sets) and columns (ways). A new block goes to its row, then the policy decides which column to overwrite when the row is full.

Why the topic needs this: replacement is always a within-a-set decision. When the parent says "2-way set-associative cache with blocks A and B", it means one row holding two blocks — and eviction picks between exactly those two. The number is the number of candidates the policy chooses among.


5. Recency and Insertion order — the two clocks

The three policies differ only in what they remember. Two notions of "old" exist, and confusing them is the classic trap.

Policy Remembers Evicts
LRU recency the least-recently-touched block
FIFO insertion order the earliest-loaded block
Random nothing any block, by coin flip

Why the topic needs this: the entire difference between LRU and FIFO is which clock they watch. A block hit ten times in a row is "fresh" by recency but still "old" by insertion order. That gap is where FIFO can throw out a hot block.


6. The recency counter — reading the LRU formula

The parent writes LRU with a counter per block:

Let us decode every symbol so it reads like plain English.

  • which block (an index, block number through ).
  • — the time step: a counter that ticks up by one on every access. , then , is "now, then next".
  • — a number attached to block : 0 means "just used", and a bigger number means "staler". The maximum means "coldest possible".
  • The two-line brace means "pick the top line if its condition holds, else the bottom line."
  • — "take , but never let it exceed ." Why cap it? Because with blocks the oldest possible rank is ; going higher is meaningless.
  • (used later in FIFO) — the remainder after dividing by . It makes a counter wrap around: for , counting then sends the next value back to . This is how a pointer cycles through the ways forever.

Why the topic needs this: without decoding , , , , and the cases brace, the LRU and FIFO update rules on the parent page are unreadable. Now every symbol is earned.


7. Miss rate and AMAT — why any of this pays off

The parent measures every policy by how it moves this number, through:

  • Hit Time — how long a hit takes (small).
  • Miss Penalty — the extra cost of going to memory on a miss (large).
  • The product is the average extra time added per access. Because Miss Penalty is big, even a tiny drop in Miss Rate is a large win — that is why a smart eviction rule matters at all.

Why the topic needs this: it is the scoreboard. Every claim like "LRU beats FIFO on this trace" is really a claim about this number. This all rests on Temporal-and-spatial-locality — the reason past behavior predicts the future.


How the foundations feed the topic

Cache is small vs memory

Cache must evict

Block is the unit moved

Set and way limit where a block lives

Replacement policy chooses victim

Recency clock

LRU

Insertion-order clock

FIFO

No memory, coin flip

Random

Miss rate and AMAT


Equipment checklist

Cover the right side; recover each from the picture in your head.

What makes a cache need a replacement policy at all?
It is smaller than memory, so when full it must throw out a block to make room.
What is a "block"?
The fixed-size chunk that moves as one unit between memory and cache; the letters A, B, C name blocks.
When does the replacement policy actually run?
Only on a miss into an already-full set — never on a hit.
In an n-way set, how many eviction candidates are there?
Exactly — the ways of that one set.
What is the difference between recency and insertion order?
Recency resets whenever you touch a block; insertion order resets only when the block is loaded and never again.
In the LRU formula, what does mean?
Block was just accessed (most recently used).
What does do and why?
Caps the rank at so a counter can't exceed the oldest possible position.
What does do to a pointer?
Wraps it around: after it returns to , cycling through the ways forever.
Why does a small drop in miss rate matter so much?
In AMAT it multiplies the large Miss Penalty, so a tiny fraction saves a lot of time.

Next: return to the parent topic and read the LRU/FIFO/Random mechanisms — every symbol there is now defined. Related prerequisites: Working-set-model, Cache-conscious-programming, 5.5.02-Virtual-memory-and-TLBs.