Foundations — Simultaneous multithreading (SMT - hyperthreading)

5.3.14 · D1 · Hardware › Advanced Microarchitecture › Simultaneous multithreading (SMT - hyperthreading)

Yeh page Simultaneous multithreading (SMT - hyperthreading) parent note ke har word aur symbol ko — bilkul zero se — build karta hai. Isse upar se neeche padho: har idea wohi foundation hai jis par agli cheez khadi hoti hai. Koi bhi cheez use nahi hoti jab tak woh draw na ho jaaye.

1. "Clock cycle" kya hota hai?

Jo bhi processor karta hai, woh sab ek metronome ki barabar ticks mein kata jaata hai. Ek tick = ek clock cycle. Ek tick ke andar chip kuch kaam shuru kar sakta hai (aur aksar khatam bhi).

Figure dekho: time left se right jaata hai, barabar boxes mein banta hua. Har box ek cycle hai. Jab hum baad mein "IPC" ya "500 cycles" bolte hain, to hum bas boxes gin rahe hain. Yahi ek clock hai jiska hum hamesha matlab nikalenge.

2. "Instruction" aur "execution unit" kya hote hain?

Ek instruction CPU ko ek chhota sa order hai: yeh do numbers add karo, memory se yeh value load karo, agar zero ho to yahaan jump karo.

Ek execution unit woh physical circuit hai jo ek tarah ka order carry out karta hai. Real cores mein kaafi hote hain:

• ALU (Arithmetic Logic Unit) — integer add / subtract / compare karta hai.
• FPU (Floating-Point Unit) — decimal-number maths karta hai.
• Load/Store unit — core aur memory ke beech data move karta hai.

Figure mein kaafi cycles ke upar 4 tools (boxes) dikhte hain. Green box = ek tool is cycle mein asli kaam kar raha hai. Grey box = ek tool khaali baitha hai. SMT ka poora point yahi hai: grey boxes banana band karo.

3. Symbol $N$ — kitne execution units hain

Hum execution units (tools) ki sankhya ke liye $N$ likhte hain. Parent note $N=4$ use karta hai.

4. Symbol IPC — Instructions Per Cycle

Ab poore topic ka sabse important symbol.

Agar koi program 500 cycles mein 1000 instructions run karta hai:

IPC kyun, "speed in GHz" kyun nahi? Clock speed (GHz) batata hai ki metronome kitni tezi se tick karta hai. IPC batata hai ki har tick mein tum kitna kaam karte ho. SMT metronome ko tez nahi karta — woh grey boxes bhar ke IPC badhata hai. Is liye IPC is topic ke liye bilkul sahi lens hai.

5. Utilization — kitne fraction tools busy rehte hain

IPC $=1.5$ aur $N=4$ ke saath:

6. Boxes grey kyun hote hain: stalls, dependencies, misses

Teen reasons hain jab ek tool khaali baithta hai. Har ek apne aap mein ek prerequisite topic hai.

(a) Data dependency. Instruction $I_2$ ko $I_1$ ka answer chahiye. Jab tak $I_1$ khatam nahi hota, $I_2$ shuru nahi ho sakta — tool wait karta hai. (Formally Pipeline Hazards mein padha jaata hai.)

(b) Cache miss. Kisi load ko jo data chahiye woh fast on-chip memory mein nahi hai, isliye core ko door wale DRAM se fetch karna padta hai — 50 se 200 cycles ki waiting. Data kahaan rehta hai yeh samajhna Memory Hierarchy hai; shared copies ko consistent rakhna Cache Coherence hai. Koi bhi aisa forced wait stall hai.

(c) Branch misprediction. Core guess karta hai ki koi if kis taraf jaayega taaki kaam karta rahe (Branch Prediction). Galat guess galat path par shuru hue kaam ko phenk deta hai — aur grey boxes.

Figure mein ek thread ki timeline dikhti hai: green ka burst, phir ek lamba grey stall (cache miss), phir dobara green. Woh grey gap pure wasted hardware hai — aur bilkul yehi jagah hai jahaan doosre thread ki instructions ja sakti theen.

7. Thread, thread context, aur "replicated vs shared"

Ek thread instructions ka ek independent stream hai — ek program ke orders ka poora sequence.

Ek core par do threads chalane ke liye, core ko kuch chhoti cheezein do baar yaad rakhni padti hain:

Yeh duplicate karne mein sasta hai (~5% extra silicon). Har mehenga cheez — execution units ($N$ tools), caches, branch predictor — shared rehta hai. Yeh asymmetry (chhoti bookkeeping duplicate karo, badi machinery share karo) wahi poori trick hai jo SMT ko affordable banati hai.

Multiple independent threads ko zyaada kaam karwane ke liye chalana Thread-Level Parallelism (TLP) kehlata hai; SMT bas TLP hai jo ek core ke andar, per cycle implement hota hai.

8. Throughput vs latency — do clocks jo confuse nahi karne chahiye

9. Symbol $f$ aur speedup model

Parent ka performance formula ek aakhri symbol use karta hai:

Simple words mein samjho: busy fraction $(1-f)$ ke dauran tools already full hain, isliye doosra thread kuch add nahi karta — woh term as-is rehta hai. Stalled fraction $f$ ke dauran, doosra thread un gaps ko fill karta hai, wasted time aadha kar deta hai — isliye $f/2$. Denominator hai "kaam ab actually kitna time leta hai"; iska reciprocal speedup hai.

$f=0.6$ ke saath:

Do extremes note karo: $f=0$ (kabhi stall nahi) speedup $=1$ deta hai (koi gain nahi), aur $f=1$ (hamesha stall) $1/0.5=2\times$ deta hai (theoretical max). Har real workload beech mein hota hai.

Prerequisite map

Equipment checklist

Khud test karo — tum parent note ke liye ready ho jab tum bina dekhe har sawaal ka jawab de sako.