Branch target buffer (BTB): Foundations — Hinglish deep dive

5.3.9 · D1 · Hardware › Advanced Microarchitecture › Branch target buffer (BTB)

Isse pehle ki tum BTB topic samjho, tumhe har woh symbol padhna aana chahiye jo woh throw karta hai. Yeh page har ek ko zero se build karta hai — plain-words meaning, ek picture, aur woh reason ki topic ko yeh kyun chahiye. Upar se neeche padho; har idea uske upar wale par depend karta hai.

1. Instruction aur Program Counter (PC)

Memory addresses hexadecimal mein likhe jaate hain — ek counting system jo digits 0-9 phir letters a-f use karta hai, aur leading 0x se mark hota hai. Toh 0x1004 bas ek address hai (ek instruction ke liye ek ghar ka number). Tumhe hex arithmetic karne ki zaroorat nahi; tumhe bas yeh jaanna hai ki 0x1004 memory mein ek jagah ka naam hai.

Figure dekho: instructions memory slots ke ek vertical stack mein rehte hain, aur PC (coral arrow) unme se exactly ek par point karta hai.

2. "PC + 4" — default next step

Normally, ek instruction run karne ke baad, CPU memory mein bilkul agla instruction fetch karta hai. Kai machines par har instruction 4 bytes wide hoti hai, isliye agla address current wala plus 4 hota hai.

" $+ 4$ " bas ek instruction ki width hai. 2-byte instructions wali machine par yeh " $+ 2$ " hota. Zaroori idea yeh hai: seedha jaana default hai.

3. Taken vs. not-taken, target vs. fall-through

Ek conditional branch (jaise "jump karo sirf tab jab do numbers equal hon") ke do possible outcomes hain:

Taken: condition true hai, toh PC target par jump karta hai.
Not taken (jise fall-through bhi kehte hain): condition false hai, toh PC bas normal jaisi PC+4 karta hai.

Figure mein, green path "taken" hai (target par jump) aur slate path "not taken" hai (agla line fall through). BTB sirf green arrow ki destination store karta hai — jahan ek taken branch land karti hai. Yeh kabhi decide nahi karta ki kaunsa arrow follow karna hai; woh kaam alag unit ka hai (Section 6).

4. Pipeline: fetch, decode, execute

Ek modern CPU ek assembly line ki tarah hai. Woh ek instruction finish karne se pehle agla shuru kar deta hai; balki woh kaam ko stages mein split karta hai aur sabko busy rakhta hai. Ise pipeline kehte hain (Pipeline Hazards explore karta hai yahan kya galat hota hai).

Woh teen stages jo tumhe jaanne chahiye:

Stage	Kya karta hai
Fetch	Memory se PC par rakhi instruction uthao
Decode	Figure out karo ki instruction kya hai (add? branch? kahan jump karti hai?)
Execute	Actually kaam karo

Figure mein instructions left-to-right teen stages se flow karti hain, ek stage per clock cycle (CPU ki heartbeat ki ek tick).

5. Instruction Cache (I-Cache) — BTB ka shape twin

Fast fetch karne ke liye, instructions ek chhoti speedy memory mein rakhi jaati hain jise Instruction Cache kehte hain (dekho Instruction Cache (I-Cache)). BTB bilkul usi tarah build hota hai jaise ek cache build hota hai, isliye cache vocabulary directly transfer hoti hai. Cache Organization se tumhe teen words chahiye:

PC ko "lower bits row pick karte hain, upper bits verify karte hain" mein kyun split karte hain? Kyunki ek chhoti table (maano 64 rows) har possible address ke liye row nahi rakh sakti. Kai addresses ek hi row share karne par majboor hain. Index tumhe shared row tak instantly pahunchata hai; tag check karta hai ki wahan currently jo address reh raha hai woh tumhara hai ya nahi.

6. Hit, miss, aur branch predictor

Do close cousins jo parent note mention karta hai:

Return Address Stack (RAS) — ek special chhoti stack jise predict karne ke liye ki function returns kahan jump karti hain (ek branch target jo BTB akela poorly predict karta hai).
Branch Delay Slots — ek purana trick jo branch ke baad ek extra instruction run karke branch penalty hide karta tha; usi delay ka ek alag solution jo BTB attack karta hai.

7. Topic ki chhoti equations padhna

Parent note ek compact bit-slicing notation use karta hai. Ise ek baar yahan decode karo:

In sab ke saath, parent ka poora lookup plain English mein padhta hai: row number paane ke liye PC chop karo, us row par jao, stored tag ko apne PC ke top bits se compare karo; agar equal hai toh hit hai aur stored target wahi hai jahan main jaunga.

Prerequisite map

Map padhta hai: PC aur PC+4 humein branch ka idea dete hain; pipeline explain karti hai ki target kyun bahut late aata hai; cache structure humein index/tag/aliasing deta hai; predictor direction supply karta hai. Yeh sab BTB ko feed karte hain.

Equipment checklist

Khud ko test karo — daayaan side cover karo aur reveal karne se pehle jawaab do.

PC kise point karta hai?

Us instruction ke memory address ko jo run hone wali hai.

"PC + 4" kya hai?

Default next instruction address; seedha aage jaana.

Branch kya hai, aur uska target kya hai?

Ek instruction jo PC ko kahin aur jump kara sakti hai; target woh jagah hai jahan woh jump karti hai.

"Taken" vs "not taken"?

Taken = target par jump karo; not taken = PC+4 par fall through karo.

Un donon mein se BTB kaunsa store karta hai — direction ya destination?

Destination (target). Direction branch predictor ka kaam hai.

Teen pipeline stages ka order batao.

Fetch, decode, execute.

BTB ke bina branch target itni late kyun pata chalta hai?

CPU sirf decode par jaanta hai ki yeh branch hai (aur uska target kya hai), fetch ke ek se do cycles baad.

Index kis cheez se bana hota hai?

PC ke lower bits — yeh decide karte hain ki table ki kaunsi row mein dekhna hai.

Tag kis kaam aata hai?

PC ke upper bits, row mein store hote hain yeh confirm karne ke liye ki sach mein tumhara address hai.

Aliasing kya hai?

Do alag addresses ka same index par map hona, toh ek doosre ki entry overwrite karta hai.

PC [7 : 2]

ka kya matlab hai aur yeh kitni rows index kar sakta hai?

Bits 7 se 2 tak (chhe bits) →

2^{6} = 64

rows.

== kya return karta hai?

True ya false — kya do values identical hain (hit vs miss).