Intuition The One Core IdeaA program names its storage with a tiny fixed set of labels (like R1, R2), but two instructions that reuse the same label for unrelated work get stuck waiting on each other for no real reason. Register renaming quietly hands each writer its own private storage box behind the scenes, so the shared label stops being a bottleneck and independent instructions can run at the same time.
This page assumes nothing . Before you can read the parent note Register renaming , you must be able to see what a register is, what a "dependency" really is, and what every arrow and bracket in its formulas mean. We build each piece, anchor it to a picture, and only then use it.
A register is a tiny, extremely fast storage box inside the processor that holds one number (typically 64 bits — a 64-digit binary number). A processor has only a handful of them, and every arithmetic instruction reads from and writes to these boxes.
Picture a row of labelled cups. Each cup holds exactly one value. The processor can only do arithmetic on values sitting in cups — never on values still out in main memory.
Intuition Why registers exist at allMemory is slow (hundreds of processor cycles away). Registers sit right next to the arithmetic unit, so reading them is essentially instant. Every fast instruction works cup-to-cup. This is why the number of cups matters so much — and why running out of them hurts.
The parent note constantly splits registers into two kinds. This split is the whole heart of the topic, so we define both from zero.
Definition Architectural register (R a r c h architectural register is a name that the program is allowed to say — like R1, R2, RAX. The instruction set (the contract between software and hardware) fixes how many of these names exist (e.g. 16 for x86-64). The program never sees anything else.
Definition Physical register (R p h y s physical register is an actual storage box in the silicon . There are far more of these (96–256) than there are architectural names. The program cannot name them directly — the hardware decides which box a name currently points to.
The notation R a r c h R p h y s label on the label telling you which world you're in: the visible naming world, or the hidden storage world.
Intuition Names vs boxes — the key mental moveThink of a hotel. Room numbers on the keycards (R1, R2, ...) are architectural — guests use them. The physical rooms (P0, P1, ...) are the real spaces. A front desk can point keycard "Room 2" at any physical room, and reassign it whenever it likes. Guests never notice. Register renaming is that front desk.
The parent note writes things like RAT [ R 1 ] → P 10 here .
Definition The mapping arrow→
A → B name A B ". It is not "becomes" and not "implies". It is a pointer: follow the arrow to find where the real value lives.
So R 1 → P 10 "the name R1 is currently pointing at physical box P10; if you want R1's value, look inside P10."
→ as "equals"
Why it feels right: In algebra an arrow often means implication or a limit.
Why it's wrong here: R 1 P 10 lookup , exactly like a dictionary entry word → definition. This distinction is the entire reason renaming is possible.
Instructions form a sequence. Sometimes a later instruction must wait for an earlier one; sometimes it only appears to. The parent note calls these RAW, WAR, WAW. Let's earn each name.
The letters stand for Read and Write applied to the same register , in a time order . Read the name as "X-After-Y":
Definition The three dependency types
RAW = Read After Write — a later instruction reads a register an earlier one wrote . It genuinely needs that value. This is a true dependency .WAR = Write After Read — a later instruction writes a register an earlier one is still reading . The writer must not clobber the box before the reader finishes.WAW = Write After Write — two instructions write the same register. Only the last write should survive.
Here is the picture that makes the difference obvious:
Intuition True vs false — the crucial splitRAW is about a value flowing from one instruction into another — you cannot cheat physics, the data must exist first. WAR and WAW are only about reusing the same name . If we gave the later writer a different box , the conflict vanishes entirely. That is why WAR/WAW are called false dependencies : they are artifacts of naming , not of data .
Mnemonic Which letter matters?The second letter is the earlier instruction, the first is the later one. RA W = "I (Read) come After your Write" — I need your data. The only one that carries real information is a W then R (RAW). Anything ending in W (WAR, WAW) is a naming clash the front desk can dissolve.
Every arithmetic instruction the parent note renames has this shape. Decode it symbol by symbol:
Definition Instruction anatomy
R d es t destination : the register where the answer is written.R sr c 1 , R sr c 2 sources : the two registers whose values are read as inputs.op operation : a placeholder for whatever arithmetic (add, multiply, subtract). We write op ← gets the value of ". The right side is computed, then stored into the left.
So ADD R1, R2, R3 means R 1 ← R 2 + R 3
Intuition Why we abstract toop
Renaming does not care whether you add or multiply — the hazard logic is identical. Writing op
These three appear in every formula. They are just three simple containers.
Definition Register Alias Table (RAT)The RAT is the front desk's ledger : a table with one row per architectural name, and each row stores the physical box that name currently points to. RAT [ R 1 ]
The square-bracket notation RAT [ R 1 ] table lookup — like reading cell "R1" of a spreadsheet. If RAT [ R 1 ] = P 10
The free list is the pile of empty boxes not currently pointed to by any name. FreeList.pop() means "take one empty box off the pile" (and now it's in use); FreeList.push(P) means "return box P to the pile" (it's empty again).
Definition Reorder Buffer (ROB)The ROB is a waiting-line log of instructions that have started but not yet officially finished. For each one it remembers the old box a name used to point to, so that if something goes wrong the front desk can undo its change. See Reorder Buffer (ROB) for the full story.
Intuition Why we need the "old box" recordedWhen we point R1 at a new box, the old box still holds a value some earlier instruction might depend on — and if an exception cancels this instruction, we must restore the old pointer. So we can only free the old box once we are certain the instruction truly completed ("committed"). The ROB is what lets us wait for that certainty.
The parent ends with N p h y s ≥ N a r c h + N R O B
Definition Symbols in the sizing rule
N p h y s count of physical boxes in silicon.N a r c h N R O B ≥ at least ". The left side must be no smaller than the right.
Intuition Why "at least" and not "equals"You need one box for every committed name plus one for every in-flight instruction that has grabbed a fresh box but not yet committed. In the worst case every ROB slot has grabbed a box, so you need N a r c h + N R O B stall (freeze) — the parent calls this register pressure .
Register = fast storage box
Architectural vs Physical registers
Instruction shape dest gets src op src
Everything on the left of an arrow is a thing you must already picture before the thing on its right makes sense. Renaming (bottom right) sits on top of all of it.
A register is a a tiny fast storage box inside the CPU that holds exactly one number.
The difference between an architectural and a physical register is architectural = a name the program is allowed to say (fixed, few); physical = an actual storage box in silicon (hidden, many).
The arrow in R 1 → P 10 "the name R1 currently points at box P10" — a lookup/pointer, NOT equality.
RAW stands for and means Read After Write — a later instruction reads a value an earlier one wrote; a TRUE dependency.
WAR and WAW are called false dependencies because they are only clashes over the same name ; giving the later writer a different box removes them, since no real data flows.
RAT [ R 2 ] look up R2's row in the alias table and read which physical box it points to right now.
FreeList.pop() doestakes one currently-empty physical box off the pile so it can be assigned to a new destination.
The ROB records the old physical mapping so that if an exception cancels the instruction the pointer can be restored, and so we know which box to free once it commits.
In Rdest ← Rsrc1 op Rsrc2, the ← means "gets the value of" — compute the right side, then store it into the destination.
N p h y s ≥ N a r c h + N R O B you need at least one box per committed name plus one per in-flight instruction, or decode stalls (register pressure).