5.1.13 · HinglishInstruction Set Architecture (ISA)

System vs user mode and privilege levels

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5.1.13 · Hardware › Instruction Set Architecture (ISA)


YE EXIST KYON KARTA HAI BILKUL BHI?


MODES KYA HAIN?

Figure — System vs user mode and privilege levels

HARDWARE USE ENFORCE KAISE KARTA HAI? (mechanism derive karo)

Hum required machinery ko step by step goal "user code cheat nahi kar sakta" se derive karte hain.

Step 1 — "Main kaun hoon" store karne ke liye ek jagah chahiye. Kyon? Check instant hona chahiye, per-instruction. Toh ek hardware status register (PSW / CPSR / mstatus) mein ek bit/field daalo. Ye state hai jo CPU har privileged op pe consult karta hai.

Step 2 — Instruction decoder bit check karta hai. Kyon? Agar user-mode program ke instruction stream mein ek privileged opcode hai, toh execution fail honi chahiye. Toh decode pe: if (opcode is privileged) and (mode == user): raise trap.

Step 3 — User code bit ko kernel pe set nahi kar sakta. Kyon? Warna referee ko bypass kiya ja sakta hai. Isliye mode bit likhna khud hi privileged hai. Tum khud ko promote nahi kar sakte. Yahi crucial fixed point hai.

Step 4 — Toh user program OS se help kaise le? Kyon zaroori? Programs ko legitimately files padhni hain, print karna hai, etc. — ye sab hood ke neeche privileged hain. Solution: ek controlled doorway, ==system call (trap / syscall/ecall)== instruction.


Worked examples


Common mistakes


Recall Feynman: ek 12-saal ke bache ko explain karo (click to reveal)

Imagine karo computer ek school hai. Bacche (apps) playground mein khel sakte hain (user mode) lekin principal ke office mein nahi ja sakte ya fire alarm touch nahi kar sakte — ye "grown-up only" buttons hain (privileged instructions). Agar koi baccha fire alarm dabane ki koshish kare, toh alarm bajta hai aur ek teacher (OS) unhe pakad leta hai. Agar kisi bacche ko kuch official chahiye (jaise jaldi jaana), toh wo ek khaas window se note pass karta hai (ek system call); teacher decide karta hai haan ya na. Is tarah ek bewakoof baccha poore school ko band nahi kar sakta.


Active-recall flashcards

#flashcards/hardware

Privileged instruction kya hota hai?
Ek instruction jo sirf kernel mode mein legal hota hai; user mode mein ise attempt karne se trap/exception raise hota hai.
Privilege levels hardware se enforce kyon hone chahiye, software se nahi?
Kyunki software checks us code ke dwara bypass kiye ja sakte hain jo check kiya ja raha hai; sirf hardware har instruction pe unavoidable hai.
User program kernel privilege kaise gain karta hai, sirf safe tarike se?
Ek syscall/trap/interrupt ke zariye, jo atomically kernel mode pe switch karta hai AUR ek OS-chosen entry vector pe jump karta hai.
Syscall ko user-supplied address ke bajaye ek fixed OS vector pe kyon jump karna chahiye?
Taaki user ye control kare ki kernel run kare, kabhi kahan nahi — kernel mode mein arbitrary code ko run hone se rokne ke liye.
x86 rings mein, kaun sabse zyada privileged hai, Ring 0 ya Ring 3?
Ring 0 (kernel); Ring 3 user hai (sabse kam privileged).
"Mode bit likhna" khud ek privileged operation kyon hai?
Warna user code khud ko kernel mode mein promote kar sakta tha aur poori protection scheme defeat ho jaati.
OS ek infinite user loop se CPU kaise wapas leta hai?
Ek pre-programmed hardware timer interrupt fire karta hai, atomically kernel mein trap karta hua.
Teen typical privileged instructions ke naam batao.
CPU halt karna, interrupts disable/enable karna, page-table base register load karna (ya direct I/O).
Jab user code x86 pe ek privileged instruction execute karta hai tab kya hota hai?
Hardware ek General Protection Fault (#GP) raise karta hai; OS handler usually process ko terminate kar deta hai.
RISC-V privilege levels, sabse zyada se sabse kam privileged?
Machine (M) → Supervisor (S) → User (U).

Connections

  • Interrupts and exceptions — trap mechanism jo mode change karta hai.
  • System calls and the OS interface — controlled doorway.
  • Virtual memory and page tables — remapping privileged hai; per-process isolation enforce karta hai.
  • Pre-emptive multitasking and the scheduler — timer interrupts pe rely karta hai.
  • Processor status register (PSW) — jahan mode bit rehta hai.
  • Instruction encoding and decoding — jahan privilege check hota hai.
  • Protection rings (x86) / Exception Levels (ARM) — multi-level generalisation.

Concept Map

motivates

enforced by

defines

defines

hosts

hosts

tells CPU

may run

blocked from

reads

user runs privileged op

halt disable IRQ I/O page-table

generalise

Untrusted programs on shared machine

Privilege levels

Hardware referee not software

User mode restricted

Kernel supervisor mode unrestricted

OS kernel

Application code

Mode bit CPL in status register

Who is running now

Privileged instructions

Instruction decoder checks bit

Raise trap exception

Dangerous operations

Rings x86 EL RISC-V M/S/U