5.1.13 · D1System vs user mode and privilege levels
Ek CPU code ko alag-alag trust levels par run kar sakta hai, aur ek single hardware bit record karta hai ki abhi is waqt kaunsa level active hai. Dangerous instructions us bit ko check karte hain aur tab tak run karne se mana kar dete hain jab tak level "kernel" na kahe — isliye ek user program physically cheat nahi kar sakta, kyunki referee silicon hai, na ki aur software.
Is page par kuch bhi assume nahi kiya gaya hai . Parent topic padhne se pehle tumhe kuch words aur pictures ki ek chhoti si toolkit chahiye. Hum har ek cheez zero se build karte hain, ek aisi order mein jahan har naya idea sirf pehle waale ideas par hi tikta hai.
Definition Instruction aur opcodeEk instruction ek chhota sa command hai jo CPU karna jaanta hai: do numbers add karo, ek value copy karo, kahin jump karo. Har instruction ek opcode se shuru hota hai — ek chhota sa number jo batata hai ki kaunsa command hai yeh. Opcode ko sentence ka "verb" samjho.
Neeche figure dekho. Ek program bas memory mein bethe aise numbered commands ki ek lambi list hai. CPU inhe ek-ek karke chalta rehta hai.
Intuition Hum yahan se kyun shuru kar rahe hainPoora topic iss baare mein hai ki CPU kuch opcodes ko run karne se mana karta hai jab use caller par trust nahi hota. Agar tum instructions ko numbered verbs ki ek stream ki tarah nahi soch sakte, toh "refusing an instruction" ka koi matlab nahi banta. Dekho Instruction encoding and decoding — kaise ek opcode ek action banta hai.
Definition Program Counter — "tum yahan ho" waala arrowPC CPU ke andar ek special box hai jisme us agli instruction ka memory address hota hai jo run hogi. Har instruction ke baad PC aage badhta hai. Ek jump bas PC mein ek nayi value likh deta hai.
Ek ungli ki tarah soch jo ek to-do list ki ek line par point kar rahi hai. Normally ungli ek-ek line neeche khiskti rehti hai. "Jump" karna matlab hai ungli ko kheench kar kisi bilkul alag line par le jaana.
Intuition Topic ko PC ki zarurat kyun haiJab ek user program OS se madad maangta hai, hardware sirf trust levels nahi badalta — balki PC ko bhi ek aisi address par move karta hai jo OS ne choose ki hoti hai . Yahi combination poora safety trick hai. Tum "user sirf yeh choose karta hai ki kernel mein ghusna hai, kahan nahi" tab tak nahi samajh sakte jab tak PC ko ek movable pointer ki tarah na dekho.
Ek register ek chhota, ultra-fast storage box hai jo seedha CPU ke andar bana hota hai. Sirf kuch dozen hote hain, har ek sirf itna bada ki ek number hold kar sake. CPU inhe main memory se kaafi zyada tez padhta aur likhta hai.
Ek muthi bhar labeled cups ki tarah socho jo seedha tumhare desk par hain, versus ek warehouse (RAM) jo town ke dusre chhor par hai.
Intuition Topic ko registers ki zarurat kyun haiJab koi program system call karta hai, toh woh pehle request number aur arguments registers mein daalta hai, kyunki registers instant hote hain aur inhe kisi memory access ki zarurat nahi. Aur mode bit jis par hmaara dhyan hai woh ek special register mein rehta hai — warehouse mein nahi — aur yahi cheez use safe rakhti hai.
Definition Status register (a.k.a. PSW / CPSR / mstatus)Ek status register ek particular register hai jo ordinary data ki jagah CPU ki current condition ke baare mein facts hold karta hai — jaise "kya last result zero tha?" aur, hamare liye sabse zaroori, "main abhi kis trust level par run kar raha hoon? ".
Figure mein, ek register fields kehlaane waale chhote labeled slots mein baanta hua hai. Un fields mein se ek hai mode bit jise hum aage build karte hain.
Intuition Topic ko PSW ki zarurat kyun haiYahan physically yeh answer rehta hai ki "abhi kaun run kar raha hai?" Dekho Processor status register (PSW) . Baad mein ki key move yeh hai ki yeh register protected hai: isme likhna khud ek privileged act hai, isliye koi user program apna khud ka trust level flip nahi kar sakta.
Ek bit information ka sabse chhota tukda hai: yeh ya toh 0 hai ya 1. Jaise ek light switch: off ya on. Ek field ek ya zyada bits ka ek group hai jise ek single number ki tarah treat kiya jaata hai.
Mode bit status register ke andar ek field hai jo ek single yes/no sawaal ka jawaab deta hai: kya main kernel mode mein hoon, ya user mode mein? Maan lo 0 = kernel, 1 = user (real CPUs ek chhota number 0–3 use kar sakte hain — same idea, bas thodi zyada jagah).
Intuition Ek bit kyun kaafi hai (shuru mein)Referee ko sabse tez possible check chahiye, jo har instruction par hota hai. Ek bit padhna utna hi tez check hai jitna ho sakta hai. Yahi speed ki wajah se trust level ek hardware bit hai na ki, kaho, kisi file mein ek lookup.
Definition Privileged instructionEk privileged instruction woh hai jise CPU tab hi carry out karta hai jab mode bit kernel kahe. Examples: machine band karo, interrupts off karo, memory remap karo. Ek unprivileged instruction (add, copy, jump) kisi bhi level par run hoti hai.
Ek do-shelf tool ki tasveer socho. Bottom shelf (add, copy) koi bhi use kar sakta hai. Top shelf (halt, remap) par ek lock laga hai, aur sirf kernel ke paas key hai — key ka matlab hai "mode bit = kernel".
Intuition Topic ko is split ki zarurat kyun haiYahi split topic hi hai . Agar "dangerous, kernel-only" instructions ki koi category nahi hoti toh protect karne ke liye kuch hota hi nahi. Parent ka poora "HOW does hardware enforce it" section yeh hai: har instruction par, agar woh top shelf ki hai aur mode bit user hai, toh mana karo.
Ek instruction ko decode karna matlab hai CPU ka uska opcode padhna aur yeh pata lagana ki iska kya matlab hai use karne se pehle . Yeh instruction fetch karne aur execute karne ke beech hota hai.
Figure pipeline dikhata hai: fetch → decode → execute . Privilege check decode par hota hai, kyunki enforcement dangerous effect se pehle aani chahiye. Baad mein check karna aisa hai jaise crash ke baad driver's licence check karo.
Intuition "Pehle" kyun matter karta haiAgar CPU mode bit baad mein check karta ek privileged instruction run karne ke baad, toh nuksan (machine band, memory remap) ho chuka hota. Check ko decode par rakhna guarantee karta hai ki effect kabhi ek unauthorized caller ke liye nahi hoga.
Definition Trap (exception)Ek trap (jise exception bhi kehte hain) CPU ka built-in "RUKO, kuch OS ki zarurat hai" reaction hai. Jab user mode mein ek privileged instruction ki koshish hoti hai, CPU use run nahi karta — balki trap karta hai: kernel mode mein switch karta hai aur PC ko ek fixed OS handler address par jump karta hai.
Ek trapdoor ki tasveer socho. Galat tile par kadam rakho (ek illegal instruction) aur tum seedha principal's office (kernel handler) mein gir jaate ho, chahe tumne chaha ho ya nahi.
Intuition Traps sirf error nahi balki enforcement hainEk trap hi woh zariya hai jisse "mana karo" "aur ab OS in charge hai" mein badalta hai. Dekho Interrupts and exceptions . Yahi trapdoor mechanism legitimate requests ko bhi power karta hai, jo agle brick hai.
Definition System call (syscall / ecall / trap instruction)Ek system call ek deliberate trap hai: ek special instruction jo ek user program run karta hai yeh kehne ke liye ki "please, OS, mere liye ek privileged kaam karo." Yeh atomically kernel mode mein switch karta hai aur PC ko OS-chosen entry address par set karta hai — kabhi bhi us address par nahi jo user pick karta hai.
Intuition Yeh dono cheezein fuse kyun honi chahiyeAgar "kernel mein switch karo" aur "address par jump karo" alag steps hote, ek attacker kernel mein switch kar sakta tha aur phir kahi bhi jump kar sakta tha, apna khud ka code poori power ke saath run karta. Inhe ek uninterruptible act mein fuse karna matlab hai ki user sirf yeh choose karta hai ki kernel mein ghusna hai, kabhi nahi kahan . Dekho System calls and the OS interface .
Ek action atomic hai agar yeh ek-ek saath ho jaata hai aur iske beech mein rukne ki koi possibility nahi. Koi dusra code — aur koi bhi interrupt — iske parts ke beech nahi aa sakta.
Light switch flip karne ki tasveer socho: yeh ya off hai ya on, kabhi "half flipped" nahi jise koi beech mein pakad sake.
Intuition Atomicity yahan ek load-bearing word kyun haiUser→kernel transition ki poori safety iske atomic hone par depend karti hai (dekho Section 8). Ek non-atomic promotion ek security hole hai. Jab bhi parent "atomic" kahe, use padho "koi attacker yahan interleave nahi kar sakta."
Definition Privilege ringsEk bit (2 levels) ki jagah, real CPUs ek chhota number use karte hain jo kaafi rings name karta hai, concentric circles ki tarah draw kiye jaate hain. Chhota number = zyada privileged. x86: Ring 0 (kernel) … Ring 3 (user). ARM: EL0–EL3. RISC-V: M/S/U.
Figure: nested circles, innermost = sabse zyada trusted. Dekho Protection rings (x86) / Exception Levels (ARM) .
Common mistake "Bada ring number matlab zyada power."Kyun sahi lagta hai: bada usually zyada hota hai. Fix: yeh ulta hai. Inner ring core ke sabse kareeb hai aur sabse zyada trusted — Ring 0 rule karta hai, Ring 3 obey karta hai.
privileged vs unprivileged
Khud ko test karo — tum tab ready ho jab har reveal se wahi match ho jo tum kehte.
Opcode kya hota hai? Woh chhota number jo instruction ki shuru mein hota hai aur batata hai ki kaunsa command hai — "verb."
Program Counter mein kya hota hai? Us agli instruction ka memory address jo run hogi; ek jump isme nayi value likhta hai.
Mode bit RAM ki jagah register mein kyun store karte hain? Registers instant padhne ke liye hote hain (check har instruction par run hota hai) aur register protected hai — user code use likh nahi sakta.
Privileged instruction kya hoti hai? Woh instruction jo CPU tab hi execute karta hai jab mode bit kernel mode kahe.
Privilege check pipeline ke kis stage par hota hai, aur kyun? Decode par — execute se pehle — taaki kisi forbidden instruction ka effect kabhi na ho.
Trap/exception kya hota hai? CPU ka built-in reaction jo kernel mode mein switch karta hai aur ek illegal instruction run karne ki jagah ek fixed OS handler par jump karta hai.
User→kernel transition atomic kyun hona chahiye? Taaki koi attacker apna code kernel mode mein mode switch aur jump ke beech interleave na kar sake.
Ring numbering mein sabse zyada privileged kaun sa hai? Sabse chhota number (Ring 0) — inner ring, sabse zyada trusted.
