Yield, defect density, and binning: Exercises — Hardware deep dive

Intuition How to use this page

These problems climb a ladder. L1 just checks you recognise the right formula. L2 asks you to plug numbers in cleanly. L3 makes you compare or reason about why one situation beats another. L4 stitches several ideas into one economic decision. L5 is open-ended mastery where you defend a design choice.

Every symbol used here was built in the parent note: the parent topic. Quick refresher of the alphabet before we start:

$A$ = area of one die (in cm², so numbers stay small).
$D_{0}$ = average fatal defects per cm² — how dirty the process is.
$λ = D_{0} A$ = expected number of defects landing on one die.
$Y$ = yield = fraction of dies that work (have zero fatal defects).
$DPW$ = gross dies per wafer (how many rectangles fit before defects).
$α$ = clustering parameter (how much defects clump together).

The three formulas we will lean on, all derived in the parent: $Y_{Poisson} = e^{- D_{0} A}, Y_{cluster} = (1 + \frac{D _{0} A}{α})^{- α}, Cost_{good} = \frac{Cost _{wafer}}{DPW \times Y} .$

Level 1 — Recognition

Recall Solution 1.1

WHAT we need: $λ$ is just "average defects per die." The parent built it as $λ = D_{0} A$ — density (per area) times area gives a pure count. WHY this and not $Y$ : the question stops at the mean count. Yield comes later, from asking "what's the chance that count is zero?" $λ = D_{0} A = 0.4 \times 2 = 0.8 .$ Units cancel: $\frac{defects}{cm ^{2}} \times cm^{2} = defects$ . A pure number, as a count should be.

Recall Solution 1.2

Answer: (a) $e^{- D_{0} A}$ . The Poisson probability of exactly $k$ events is $P (k) = \frac{λ ^{k} e ^{- λ}}{k !}$ . Set $k = 0$ : $\frac{λ ^{0} e ^{- λ}}{0 !} = e^{- λ} = e^{- D_{0} A}$ . (b) is only the first two terms of the Taylor series of $e^{- λ}$ and goes negative once $D_{0} A > 1$ — impossible for a probability. (c) blows up as $D_{0} A \to 0$ , giving yields above 1 — also impossible.

Level 2 — Application

Recall Solution 2.1

Step 1 — mean: $λ = D_{0} A = 0.8$ (from 1.1). Step 2 — plug into $e^{- λ}$ : Why? Yield = probability of zero defects. $Y = e^{- 0.8} = 0.4493 \approx 44.9% .$ So of every 100 dies you print, about 45 survive.

Recall Solution 2.2

Step 1 — radius: diameter $200 mm = 20 cm$ , so $r = 10 cm$ . Step 2 — naive count (circle area ÷ die area): $\frac{π r ^{2}}{A} = \frac{π \times 100}{0.5} = \frac{314.159}{0.5} = 628.3.$ Step 3 — edge-loss term (the rim of partial dies): $\frac{π 2 r}{2 A} = \frac{π \times 20}{1} = \frac{62.83}{1} = 62.83.$ Step 4 — subtract: $628.3 - 62.8 = 565.5 \Rightarrow 565$ dies. Why subtract? Round wafer, square dies — the ring at the curved edge holds dies chopped in half that we can't use.

Recall Solution 2.3

Step 1 — yield for THIS die: $λ = 0.4 \times 0.5 = 0.2$ , so $Y = e^{- 0.2} = 0.8187 \approx 81.9%.$ Small die → tiny target for defects → high yield. Step 2 — good dies: $DPW \times Y = 565 \times 0.8187 = 462.6 \approx 462$ good dies. Step 3 — cost per good die: Why divide by good, not gross? You pay for the whole wafer no matter how many die; only the survivors earn money. $Cost_{good} = \frac{5000}{462.6} = $10.81 .$

Level 3 — Analysis

Recall Solution 3.1

Step 1 — write both: $Y_{S} = e^{- 0.5 \cdot 1} = e^{- 0.5}$ , $Y_{B} = e^{- 0.5 \cdot 4} = e^{- 2}$ . Step 2 — relate exponents: $e^{- 2} = e^{- 0.5 \times 4} = (e^{- 0.5})^{4}$ . Why does this work? The exponent laws: $e^{- D_{0} A}$ with $A$ multiplied by 4 pulls the 4 out as a power, not a factor. This is the whole reason yield collapses for big chips. Step 3 — numbers: $Y_{S} = e^{- 0.5} = 0.6065$ (≈61%), $Y_{B} = e^{- 2} = 0.1353$ (≈13.5%). Interpretation: quadrupling area doesn't cut yield to a quarter (that would be $\approx 15%$ by luck here, but the mechanism is different) — it raises the survival factor to the 4th power. Look at the steep exponential in the figure: a big die is a big target, and every extra bit of area multiplies the death chance.

Figure — Yield, defect density, and binning

Recall Solution 3.2

Poisson baseline: $Y = e^{- 2} = 0.1353$ . Clustered: $Y = (1 + \frac{2}{α})^{- α}$ .

$α = 1$ : $(1 + 2)^{- 1} = 3^{- 1} = 0.3333$ → 33.3%.
$α = 4$ : $(1 + 0.5)^{- 4} = 1. 5^{- 4} = 0.1975$ → 19.8%.
$α \to \infty$ : collapses to $e^{- 2} = 0.1353$ → 13.5% (the sanity anchor). Trend: small $α$ = heavy clustering = defects pile onto a few dies, sparing the rest → highest yield. As $α$ grows, clustering fades and yield sinks toward the pessimistic Poisson floor. See how the curve slides down toward the dashed Poisson line.

Level 4 — Synthesis

Recall Solution 4.1

Plan Mono. DPW: $\frac{π \cdot 225}{6} - \frac{π \cdot 30}{12} = \frac{706.86}{6} - \frac{94.25}{3.4641} = 117.81 - 27.21 = 90.6 \to 90$ . Yield: $λ = 0.3 \times 6 = 1.8$ , $Y = e^{- 1.8} = 0.1653$ . Good products = $90 \times 0.1653 = 14.88 \to 14$ . Cost per product $= \frac{8000}{14.88} = \boxed{\$ 537.6}$.

Plan Chiplet. DPW (per chiplet, $A = 3$ ): $\frac{706.86}{3} - \frac{94.25}{6} = 235.62 - 38.48 = 197.1 \to 197$ . Yield per chiplet: $λ = 0.3 \times 3 = 0.9$ , $Y = e^{- 0.9} = 0.4066$ . Good chiplets = $197 \times 0.4066 = 80.1 \to 80$ . Good products (need 2 chiplets each) $= 80/2 = 40$ . Cost per product $= \frac{8000}{40} = \boxed{\$ 200}$.

Recommendation: Plan Chiplet. At $200 vs $537.6 per working product it is far cheaper, because splitting the area drops each chiplet's $λ$ from 1.8 to 0.9 and yield is exponential in $λ$ : two small dies each survive much more often than one big die. This is exactly the argument behind Chiplets and MCM. (Real life adds packaging/interconnect cost — see Chip economics and cost per transistor.)

Level 5 — Mastery

Recall Solution 5.1

Each core good with probability $q = 1 - p = 0.9$ . Number of good cores follows a binomial distribution: $P (k good) = (k 8) q^{k} p^{8 - k}$ . Why binomial, not Poisson? We have a fixed, small number of independent yes/no trials (8 cores), which is the binomial setting — Poisson is the limit of many rare trials.

(a) Perfect 8-core: all cores good. $P (8) = q^{8} = 0. 9^{8} = 0.4305 \to 43.0% .$ (b) 6-core bin = exactly 6 or 7 good (8-good already claimed by top bin): $P (7) = (7 8) q^{7} p^{1} = 8 \times 0. 9^{7} \times 0.1 = 8 \times 0.4783 \times 0.1 = 0.3826.$ $P (6) = (6 8) q^{6} p^{2} = 28 \times 0. 9^{6} \times 0.01 = 28 \times 0.5314 \times 0.01 = 0.1488.$ $P (6 or 7) = 0.3826 + 0.1488 = 0.5314 \to 53.1% .$ (c) The point: without harvesting, only 43% of dies (the perfect ones) would sell — the rest are "failed." Binning rescues the 53.1% that have 6–7 good cores: fuse off the bad cores and sell them as a cheaper 6-core SKU. Total sellable fraction jumps from 43% to $43.0 + 53.1 = 96.1%$ . That recovered revenue is why Wafer testing and probe measures per-block health, not just pass/fail — it decides which bin each die lands in.

Recall Solution 5.2

Effect 1 (helps yield): smaller area. Shrinking transistors shrinks $A$ , and $Y = e^{- D_{0} A}$ rises as $A$ falls. Good. Effect 2 (hurts yield): higher $D_{0}$ on a new node. A brand-new node is immature — tighter feature sizes mean smaller specks now count as fatal, and the process hasn't been tuned, so $D_{0}$ spikes. Since $Y = e^{- D_{0} A}$ depends on the product $D_{0} A$ , a large jump in $D_{0}$ can overwhelm the drop in $A$ . Verdict: early in a node's life, rising $D_{0}$ usually wins → yield dips (the dreaded early "yield valley"), then recovers as Photolithography and defect control mature (the "yield ramp") and $D_{0}$ falls. The parent's mistake-callout — " $D_{0}$ is not a fixed material constant" — is exactly this story: $D_{0}$ is a maturity number that moves over time.

Recall One-line self-test

Cover the solutions and re-derive Exercise 3.1's identity $Y_{B} = (Y_{S})^{4}$ from the exponent laws alone. $Y_{B} = e^{- D_{0} (4 A)} = (e^{- D_{0} A})^{4} = (Y_{S})^{4}$ ::: because multiplying the exponent by 4 is the same as raising the whole factor to the 4th power.

Connections

Yield, defect density, and binning — the parent this drills.
Poisson distribution — origin of $e^{- D_{0} A}$ .
Chiplets and MCM — the L4 area-splitting payoff.
Chip economics and cost per transistor — where cost-per-good-die lives.
Process node scaling — the L5 $D_{0}$ -vs- $A$ tension.