Subtractors: Worked examples — Hardware deep dive

This page is the exhaustive drill room for the Subtractors parent note. We are not learning new theory here — we are stress-testing the formulas against every kind of input the topic can hand you, so that when an exam or a real circuit throws an edge case, you have already seen it.

Two formulas carry this whole page. Keep them in view:

A reminder on the three symbols, because we will use them on every line:

$A$ = the top bit (the number we subtract from). Picture it as candies in the upper jar.
$B$ = the bottom bit (the amount we take away).
$\oplus$ = XOR, which outputs $1$ when the inputs disagree (see XOR-Gate).
$\overset{ˉ}{A}$ = "NOT $A$ ", i.e. flip $A$ : $\overset{ˉ}{0} = 1$ , $\overset{ˉ}{1} = 0$ .
$B_{o u t}$ = borrow-out, the "I owe the next-higher column one" note.

The scenario matrix

Every situation subtraction can throw falls into one of these cells. The worked examples below are each tagged with the cell they cover, and together they hit all of them.

Cell	What makes it special	Covered by
C1 — HS, no borrow	top ≥ bottom, single column	Ex 1
C2 — HS, borrow forced	$A = 0, B = 1$ : the "boss is broke" case	Ex 2
C3 — FS, all zero (degenerate)	every input $0$ : does anything happen?	Ex 3
C4 — FS, double-borrow (most negative)	$A = 0, B = 1, B_{in} = 1 \to - 2$	Ex 4
C5 — FS, borrow cancels	inputs conspire so no borrow leaves	Ex 5
C6 — Multi-bit, $A > B$ (positive result)	ripple chain, final borrow $= 0$	Ex 6
C7 — Multi-bit, $A < B$ (negative / wraps)	final borrow $= 1$ , what it means	Ex 7
C8 — Subtraction via 2's-complement adder	the real-CPU method	Ex 8
C9 — Word problem (real world)	a bank balance / countdown	Ex 9
C10 — Exam twist (limiting / all-ones)	$A = B$ largest value, borrow behaviour	Ex 10

Single-column examples (Half & Full Subtractor)

Multi-bit examples (Ripple chains)

Now we cascade full subtractors, LSB → MSB, feeding each column's $B_{o u t}$ into the next as $B_{in}$ . This is a ripple-borrow chain. See the wiring below.

Worked example Ex 7 — Cell C7: multi-bit

$A < B$ , result wraps ( $2 - 5$ , 3-bit) $2 = 010$ , $5 = 101$ . What happens when the top number is smaller?

Forecast: $2 - 5 = - 3$ , which is negative. In unsigned hardware a negative can't be stored, so we expect the final borrow $= 1$ (a flag saying "answer went negative") and the bits to show $2^{3} + (2 - 5) = 5 = 101$ .

bit0: $A = 0, B = 1, B_{in} = 0 \Rightarrow D_{0} = 1$ , $B_{o u t} = \overset{ˉ}{0} \cdot 1 = 1$ . Why this step? $0 - 1$ borrows.
bit1: $A = 1, B = 0, B_{in} = 1 \Rightarrow D_{1} = 1 \oplus 0 \oplus 1 = 0$ , $B_{o u t} = \overset{ˉ}{1} \cdot 0 + \overset{ˉ}{1} \cdot 1 + 0 \cdot 1 = 0$ . Why this step? top $1$ absorbs the incoming borrow, none leaves.
bit2: $A = 0, B = 1, B_{in} = 0 \Rightarrow D_{2} = 1$ , $B_{o u t} = \overset{ˉ}{0} \cdot 1 = 1$ . Why this step? $0 - 1$ borrows again — this is the borrow that leaves the whole 3-bit block.

Verify: result bits $= 101 = 5$ , and $5 = 8 - 3 = 2^{3} + (2 - 5)$ . Final borrow $= 1$ correctly flags " $A < B$ , true answer is negative". ✓

Reading the flag: the final $B_{o u t} = 1$ is the hardware's way of saying "I had to borrow past the last column — the real result is negative."

Subtraction using the adder (2's-complement)

Worked example Ex 8 — Cell C8: compute

$6 - 3$ with an ADDER, not a subtractor Real CPUs (see Adder-Subtractor-Circuit) never build a dedicated subtractor. They compute $A + \overset{ˉ}{B} + 1$ using an adder. Let's do $6 - 3$ this way with $n = 3$ bits. $6 = 110$ , $3 = 011$ .

Forecast: $6 - 3 = 3 = 011$ . Using $A + \overset{ˉ}{B} + 1$ : invert $B$ , add $1$ , add to $A$ , throw away the final carry. Guess the low 3 bits come out $011$ and a carry-out of $1$ appears.

Invert $B$ : $\overset{ˉ}{B} = \overline{011} = 100$ . Why this step? 2's complement of $B$ is $\overset{ˉ}{B} + 1$ ; the invert is done by XOR gates with the control line set to $1$ .
Set carry-in $= 1$ (this supplies the " $+ 1$ "). Why this step? without the $+ 1$ you'd have only 1's-complement — off by one.
Add: $A + \overset{ˉ}{B} + 1 = 110 + 100 + 1$ . Compute $110 + 100 = 1010$ (that's $6 + 4 = 10$ ), then $+ 1 = 1011 = 11$ . Why this step? this is $A + (2^{n} - B) = 2^{n} + (A - B) = 8 + 3 = 11$ .
Discard the top carry (the $2^{n} = 8$ bit): keep low 3 bits of $1011$ → $011 = 3$ . Why this step? the $2^{3}$ is exactly the carry-out you throw away, leaving $A - B$ .

Verify: low bits $= 011 = 3 = 6 - 3$ , and carry-out $= 1$ (meaning $A \geq B$ , result non-negative — note the carry flag is the opposite convention to the borrow flag). ✓

Word problem & exam twist

Worked example Ex 9 — Cell C9: real-world word problem (a countdown)

A gate counter shows $4$ people inside. $6$ people try to leave. Using 3-bit subtraction, what does the counter compute, and what does the borrow flag tell the guard?

Forecast: $4 - 6 = - 2$ : more people left than were inside (data error!). We expect a final borrow $= 1$ warning the guard, and wrapped bits $2^{3} - 2 = 6 = 110$ .

$A = 4 = 100$ , $B = 6 = 110$ . Why this step? encode the real quantities in binary.
bit0: $0 - 0 - 0 \Rightarrow D_{0} = 0, B_{o u t} = 0$ . bit1: $0 - 1 - 0 \Rightarrow D_{1} = 1, B_{o u t} = 1$ ( $0 - 1$ borrows). bit2: $1 - 1 - 1 = - 1 \Rightarrow D_{2} = 1 \oplus 1 \oplus 1 = 1$ , $B_{o u t} = \overset{ˉ}{1} \cdot 1 + \overset{ˉ}{1} \cdot 1 + 1 \cdot 1 = 0 + 0 + 1 = 1$ . Why this step? ripple the borrow through all three columns.
Read result: $D_{2} D_{1} D_{0} = 110 = 6$ , final borrow $= 1$ . Why this step? the borrow-out is the guard's "impossible — more left than present" alarm.

Verify: $2^{3} + (4 - 6) = 8 - 2 = 6 = 110$ ✓, and final borrow $= 1$ correctly flags the negative (nonsensical) result. ✓ The guard learns the count is corrupted.

Recall Cover-check: can you place each into its cell?

Ex 2 hits which cell? ::: C2 — HS borrow forced ( $A = 0, B = 1$ ) Which example proves an incoming borrow need NOT cause an outgoing one? ::: Ex 5 (Cell C5), $A = 1, B = 0, B_{in} = 1$ Which two examples show the final borrow flag = "result is negative"? ::: Ex 7 ( $2 - 5$ ) and Ex 9 (the countdown) In Ex 8, what supplies the "+1" of 2's complement? ::: The adder's carry-in set to 1

Connections

Subtractors — the parent theory these examples exercise.
Adders — Ex 8 reuses an adder to subtract.
Twos-Complement-Representation — the $A + \overset{ˉ}{B} + 1$ trick in Ex 8.
Adder-Subtractor-Circuit — one control line does both, per Ex 8.
XOR-Gate — every $D$ computation is a parity/XOR.
Ripple-Carry-Chains — the cascade in Ex 6, 7, 9, 10.