JFET structure and operation — Hinglish notes

2.4.7 · Hardware › Transistors: BJT & FET

JFET KYA hota hai?

Ek n-channel JFET ke liye: n-type silicon ka ek bar channel banata hai; dono taraf do p-type regions gate banate hain. p-channel JFET ke liye, saare types aur voltage polarities ko invert kar do.

Gate ko reverse-bias KYUN karte hain? (core trick)

Yeh KAISE operate karta hai — teen regimes

Maano $V_{GS}$ = gate-to-source voltage, $V_{D S}$ = drain-to-source voltage. N-channel device ke liye, $V_{GS} \leq 0$ (gate ko negative rakha jaata hai taaki junction reverse-biased rahe).

1. Ohmic (triode) region — chhota $V_{D S}$

Jab $V_{D S}$ bahut chhota hota hai, channel ek simple voltage-controlled resistor ki tarah behave karta hai. $I_{D}$ almost linearly $V_{D S}$ ke saath badhta hai, aur uski slope $V_{GS}$ se set hoti hai.

2. Pinch-off aur saturation

Jab $V_{D S}$ badhta hai, drain ke paas depletion region grow hoti hai (wahaan junction par reverse bias sabse zyada hoti hai, kyunki drain ke paas channel higher potential par hota hai). Aakhir mein channel pinch off ho jaata hai drain ke paas. Iske aage, $I_{D}$ almost constant ho jaata hai — device saturate ho jaati hai.

3. Cutoff

Jab $V_{GS} \leq V_{GS (o f f)}$ , depletion regions channel ke saare length mein mil jaate hain: yeh fully band ho jaata hai, $I_{D} \approx 0$ .

DERIVATION — transfer equation kahaan se aati hai

Hum poori 2-D Poisson equation solve nahi karenge, lekin hum Shockley ki equation ko physical constraints se build kar sakte hain.

Step 1 — $I_{D}$ ko kya control karta hai? Channel conductance open channel width par depend karti hai. Ek normalized "cutoff se kitna door" variable define karo: $x = \frac{V _{GS} - V _{GS (o f f)}}{0 - V _{GS (o f f)}} = 1 - \frac{V _{GS}}{V _{GS (o f f)}}$ Yeh step kyun? $V_{GS} = 0$ par, $x = 1$ (fully open). $V_{GS} = V_{GS (o f f)}$ par, $x = 0$ (fully closed). Toh $x$ $0 \to 1$ range karta hai aur "openness" ka fraction capture karta hai.

Step 2 — width voltage ke square root ke saath shrink hoti hai. Ek step junction ke liye ek key result yeh hai ki depletion width $V$ ki tarah badhti hai. Channel-charge integral (Shockley's analysis) ke through kaam karne par, saturation mein yeh milta hai ki $I_{D}$ openness variable ke square par depend karta hai: $I_{D} = I_{D S S} (1 - \frac{V _{GS}}{V _{GS (o f f)}})^{2}$

Yeh step kyun? $x$ ko square karna channel charge ko uski length ke along integrate karne se aata hai jab depletion width $V$ ki tarah vary karti hai; algebra collapse hokar ek clean parabola banta hai.

Step 3 — constant $I_{D S S}$ fix karna. $V_{GS} = 0$ set karo: toh bracket $= 1$ ho jaata hai, isliye $I_{D} = I_{D S S}$ .

Transconductance (yeh measure karta hai ki $V_{GS}$ $I_{D}$ ko kitni strongly steer karta hai) derivative hota hai: $g_{m} = \frac{d I _{D}}{d V _{GS}} = \frac{- 2 I _{D S S}}{V _{GS (o f f)}} (1 - \frac{V _{GS}}{V _{GS (o f f)}}) = g_{m 0} (1 - \frac{V _{GS}}{V _{GS (o f f)}})$ jahaan $g_{m 0} = \frac{- 2 I _{D S S}}{V _{GS (o f f)}}$ $V_{GS} = 0$ par transconductance hai.

$g_{m}$ kyun derive karein? Yeh literally transfer curve ka slope hai — JFET ka "gain knob." Steel-man: $g_{m}$ yaad karna safe lagta hai, lekin agar tum Shockley differentiate kar sako toh tumhe kabhi yaad karne ki zaroorat nahi.

Worked Examples

Common Mistakes (Steel-manned)

Recall Feynman: ek 12-saal ke bachche ko samjhao

Socho ek garden hose (channel) jisme paani flow ho raha hai. Gate hose ke dono taraf do soft pads ki tarah hai. Jab tum pads press karte ho (gate ko zyada negative karte ho), hose squeeze ho jaata hai aur kam paani flow hota hai. Zyada press karo aur hose fully pinch ho jaata hai — bilkul paani nahi. Cool part yeh hai: tum electric field se press karte ho, toh tumhari ungliyan paani ko actually touch nahi karti — tum ek bade flow ko control karne mein almost koi energy use nahi karte. Yahi ek JFET hai!

Active Recall

JFET ka full form kya hai?

Junction Field-Effect Transistor.

JFET ko "unipolar" kyun kehte hain?

Sirf ek carrier type (n-channel mein electrons, p-channel mein holes) current carry karta hai.

JFET ke gate junction ko kya bias karta hai?

Yeh reverse-biased hota hai, isliye almost koi gate current nahi flow hoti.

Channel width ko physically kya control karta hai?

Reverse-biased PN junction ke depletion region ki width.

I_{D S S}

define karo.

Saturation mein drain current jab gate source se shorted ho (

V_{GS} = 0

); maximum

I_{D}

V_{GS (o f f)}

define karo.

Woh gate-source voltage jis par channel fully pinch off ho jaata hai aur

I_{D} \approx 0

Shockley's equation batao.

I_{D} = I_{D S S} (1 - V_{GS} / V_{GS (o f f)})^{2}

, saturation mein valid.

Pinch-off kya hota hai?

Woh point jahaan depletion region drain ke paas channel band kar deti hai; iske aage

I_{D}

saturate ho jaata hai.

JFET ki input resistance itni high kyun hoti hai?

Gate junction reverse-biased hoti hai, isliye gate current almost zero hoti hai.

Transconductance

g_{m}

ka formula?

g_{m} = (- 2 I_{D S S} / V_{GS (o f f)}) (1 - V_{GS} / V_{GS (o f f)})

Shockley's equation kis region mein valid hai?

Saturation (pinch-off) region mein, ohmic region mein nahi.

N-channel JFET ke liye, agar

V_{GS} > 0

ho toh kya hota hai?

Gate junction forward-bias ho jaati hai, gate conduct karta hai, aur control kho jaata hai / device damage ho sakti hai.

Kaun sa region JFET ko voltage-controlled resistor ki tarah behave karata hai?

Ohmic (triode) region, chhote

V_{D S}

par.

Connections

BJT vs FET comparison — current-controlled vs voltage-controlled.
MOSFET structure and operation — insulated gate PN junction ko replace karta hai.
PN junction depletion region — woh physics jo "valve" banata hai.
JFET biasing (self-bias, voltage-divider) — operating point set karna.
Transconductance and small-signal models — amplifiers ke liye $g_{m}$ use karna.
JFET as amplifier and switch — upar diye regions ke applications.