Compute equivalent resistance in mixed networks

1.2.2 · Hardware › Circuit Analysis Fundamentals

Do atomic rules (derive karo, memorize mat karo)

Algorithm (80/20 core)

Figure — Compute equivalent resistance in mixed networks

Worked Example 1 — ek parallel andar ek series mein

$R_{A B}$ nikalo: $R_{1} = 6 Ω$ series mein ( $R_{2} = 4 Ω ∥ R_{3} = 4 Ω$ ) ke saath.

Step 1 — parallel pair collapse karo. $R_{23} = \frac{4 \cdot 4}{4 + 4} = \frac{16}{8} = 2 Ω$ Yeh step kyun? $R_{2}$ aur $R_{3}$ dono nodes share karte hain → same voltage → parallel rule.

Step 2 — series add karo. $R_{A B} = R_{1} + R_{23} = 6 + 2 = 8 Ω$ Yeh step kyun? Collapse karne ke baad, $R_{1}$ aur $2 Ω$ block ek single node share karte hain jisme kuch aur nahi → same current → series.

Worked Example 2 — nested series-then-parallel

$R_{1} = 2 Ω$ aur $R_{2} = 4 Ω$ series mein hain; woh combo $R_{3} = 6 Ω$ ke parallel mein hai.

Step 1 — pehle series (yeh inner group hai). $R_{12} = 2 + 4 = 6 Ω$ Yeh step kyun? $R_{1}$ – $R_{2}$ ek path banate hain jo identical current carry karta hai $R_{3}$ ke node se rejoin karne se pehle.

Step 2 — $R_{3}$ ke saath parallel. $R_{e q} = \frac{6 \cdot 6}{6 + 6} = \frac{36}{12} = 3 Ω$ Yeh step kyun? $6 Ω$ path aur $R_{3}$ ab dono terminals share karte hain → same voltage.

Worked Example 3 — ek ladder (Forecast-then-Verify)

Terminals A–B. $R_{1} = 10 Ω$ A se, phir node C. C se: $R_{2} = 10 Ω$ seedha B tak, aur $R_{3} = 10 Ω$ node D tak phir $R_{4} = 10 Ω$ B tak.

Step 1 — lower branch mein series. $R_{34} = 10 + 10 = 20 Ω (same current through R_{3}, R_{4})$

Step 2 — node C par parallel. $R_{C} = \frac{10 \cdot 20}{10 + 20} = \frac{200}{30} = 6.67 Ω$

Step 3 — $R_{1}$ ke saath series. $R_{A B} = 10 + 6.67 = 16.67 Ω$ Forecast (17) verified answer (16.67) se match kiya → structure samajh aaya. ✓

Common mistake Classic errors ko steel-man karo

Galat idea 1: "Woh dikhai dete hain ek-dusre ke paas, toh series mein hain." Kyun sahi lagta hai: physical layout linear lagti hai. Fix: series ke liye shared node par kuch aur attached nahi hona chahiye. Agar teesri wire us node ko tap karti hai, current split hoti hai — series nahi.

Galat idea 2: Parallel resistors ko directly add karna ( $R_{1} + R_{2}$ ). Kyun sahi lagta hai: series addition pehla rule hai jo tum seekhte ho, isliye over-apply karte ho. Fix: parallel mein conductances $1/ R$ add hote hain, resistances nahi. Result hamesha chhota hota hai — use bug alarm ki tarah use karo.

Galat idea 3: Reciprocal ko flip karna bhool jana. Tum $\frac{1}{R _{1}} + \frac{1}{R _{2}} = 0.5$ compute karte ho aur $R = 0.5 Ω$ likh dete ho. Fix: woh $0.5$ hai $1/ R_{e q}$ ; answer hai $R_{e q} = 1/0.5 = 2 Ω$ .

Recall Feynman: ek 12-saal ke bacche ko explain karo

Socho paani ke pipes. Pipes ko end-to-end lagana (series) ek lambi patli pipe banata hai — paani ke liye mushkil, isliye resistance add hoti hai. Pipes ko side-by-side lagana (parallel) paani ko zyada darwaze deta hai jaane ke liye — aasaan, isliye total resistance akele sabse patli pipe se bhi kam ho jaati hai. "Ek pipe" nikalne ke liye jo puri messy plumbing ki tarah act kare, tum choti side-by-side aur end-to-end bunches ko milate rehte ho jab tak tap aur drain ke beech sirf ek pipe na bach jaye.

Active recall

Two resistors are in series when…

woh exactly ek node share karte hain jo kuch aur se connect nahi hota, isliye same current carry karte hain.

Two resistors are in parallel when…

woh dono end nodes share karte hain, isliye unke across same voltage hota hai.

Series equivalent resistance formula

R_{e q} = R_{1} + R_{2} + \dots

(resistances add hote hain).

Parallel equivalent resistance formula

\frac{1}{R _{e q}} = \frac{1}{R _{1}} + \frac{1}{R _{2}} + \dots

(conductances add hote hain).

Product-over-sum rule aur uski restriction

R_{e q} = \frac{R _{1} R _{2}}{R _{1} + R _{2}}

, sirf exactly do resistors ke liye valid.

Series resistance kyun badhata hai?

Current ek lambi path travel karta hai; voltage drops add hote hain (KVL) → same current, bada total drop.

Parallel resistance kyun ghatata hai?

Extra branches current ko zyada paths deti hain; currents add hote hain (KCL) → same voltage, bada total current, chhota effective R.

Mixed network solve karne ki strategy

Nodes label karo, innermost series/parallel groups ek ek karke collapse karo, redraw karo, repeat karo jab tak ek resistor na bache.

Agar kuch purely series ya parallel nahi hai toh?

Yeh bridge network hai; Y–Δ (delta-wye) transformation apply karo.

Parallel step ke baad common bug alarm

Agar

R_{e q}

sabse choti branch se bada nikla, toh galti hui hai (parallel use shrink karna chahiye).

Connections

Ohm's Law — woh linearity jo ek box ko ek resistor ke barabar karne deti hai
Kirchhoff's Voltage Law — series addition ko justify karta hai
Kirchhoff's Current Law — parallel addition ko justify karta hai
Delta-Wye Transformation — non-series-parallel bridges ke liye
Voltage Divider aur Current Divider — inn rules ke direct consequences
Conductance and Admittance — parallel mein conductances add hoti hain