5.5.23 · D1Embedded Systems & Real-Time Software

Foundations — Watchdog timers — purpose, feeding, types

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Before you can read a single line of watchdog code or plug numbers into the timeout formula, you need to own about a dozen small ideas. The parent note the watchdog topic assumes you already know what a "counter", a "clock", a "prescaler", and a "reset" are. This page builds every one of them from nothing, in the order they depend on each other, so that when a symbol like or shows up, you already know exactly what picture it points at.


1. A clock — the heartbeat that makes everything move

Picture a metronome for a piano student: tick… tick… tick… at perfectly even spacing. The chip has exactly this, but millions of ticks per second.

Figure — Watchdog timers — purpose, feeding, types

The single number that describes a clock is its frequency.

Why the topic needs it: the watchdog is driven by a clock. How fast the watchdog's counter changes is set entirely by this . In the parent formula it appears as — the frequency of the clock feeding the watchdog specifically (which, as we'll see, is often a different, independent clock from the CPU's — see Hardware Timer Peripherals).


2. A counter — remembering how many ticks have passed

Picture a numbered dial that the clock nudges one notch every tick. Left alone, a down-counter slides steadily toward zero.

Figure — Watchdog timers — purpose, feeding, types

Why the topic needs it: is where a fresh watchdog counter starts before counting down. "Feeding" the watchdog means slamming the counter back up to . The bigger , the longer the slide to zero, so it directly sets how long you have before a reset.

Recall Why is

and not ? Because counting starts at . bits give distinct values ( through ), so the largest single value is one less than . ::: With 16 bits: distinct values, top value .


3. The prescaler — slowing the clock down on purpose

Here's a problem. A chip clock ticks millions of times per second. A 16-bit counter only holds up to . At full speed it would count down to zero in a tiny fraction of a second — far too fast to be useful. We need a way to make the counter tick slower.

Picture a turnstile that only opens on every 64th person: the crowd (fast clock) arrives quickly, but the room beyond (the counter) fills slowly.

Figure — Watchdog timers — purpose, feeding, types

Why the topic needs it: the prescaler is the tuning knob. It is exactly the prescaler in the parent's timeout formula. Small → fast counting → short timeout (fast recovery but risk of false resets). Large → slow counting → long timeout (tolerant of slow operations). Everything about choosing a watchdog timeout is choosing .


4. Feeding — the act that keeps you alive

Picture pushing a boulder that is slowly rolling toward a cliff (zero) back up the hill. As long as you push often enough, it never rolls off.

Why the topic needs it: feeding is the whole interaction between your software and the watchdog. The parent's entire discussion of "feeding strategies" and "feeding too early / too late" is about when in your program you perform this one action.


5. Reset and interrupt — what happens at zero

Why the topic needs it: "reaches zero → reset or interrupt" is the whole point of the watchdog's existence. Without understanding what a reset actually does to a running program, "it resets the system" is meaningless.


6. Timeout period and the feasibility window

Why the topic needs it: these three symbols are the entire vocabulary of the "Window Watchdog" section. is just when your code actually calls the feed instruction, measured from the last feed.


7. Why "independent clock" matters — the failure story

This is why the parent stresses "separate clock source" — and why a watchdog is a genuine Safe State Design tool, not just a fancy timer.


Prerequisite map

Clock ticks steadily

Frequency f in hertz

One tick lasts 1 over f

Counter changes by 1 per tick

Down-counter slides to zero

Bits give N_max the top value

Prescaler P divides the clock

Time per step P over f_clock

Timeout N_max times step time

Feeding reloads counter to N_max

Reach zero triggers reset or interrupt

Watchdog Timer topic

Read it bottom-up: clock and bits make a counting counter, the prescaler sets its speed, that gives the timeout, feeding resets it, and hitting zero fires the reset — which is the watchdog.


Equipment checklist

Cover the right side and answer each before moving to the parent note.

What does a clock's frequency measure, and what is its unit?
How many cycles (ticks) happen per second; measured in hertz (Hz).
If a clock runs at Hz, how long does one tick last?
seconds — the reciprocal of the frequency.
What is the difference between an up-counter and a down-counter?
An up-counter adds 1 each tick; a down-counter subtracts 1 each tick. A watchdog is a down-counter.
For a -bit counter, what is and why?
; counting starts at 0, so distinct values give a top value one less than .
What does a prescaler do to the clock reaching the counter?
It divides it: only 1 of every ticks passes, so and each step takes seconds.
Why do we multiply by to get the timeout?
Sliding from to 0 takes steps, each lasting ; stacking them gives .
What does "feeding" the watchdog physically do?
Writes a special register value that reloads the down-counter back up to , buying another full timeout.
What happens when the counter reaches zero?
The watchdog triggers a system reset (or first an interrupt), restarting the software.
Why does a good hardware watchdog use its own separate clock?
So that if the main CPU clock fails, the watchdog keeps counting on its independent clock and can still force a reset.
In a window watchdog, when is a feed valid?
Only when — not too early and not too late.